Lab 2 - EE 421L 

10-bit DAC design

Authored by Dan Ray Dimapilis,

due: 09/08/2021

rebel mail: dimapd1@unlv.nevada.edu

Lab2 is about designing a 10-bit DAC or digital ot analog converter.

A DAC is a system that converts a digital signal or an analog signal. Conversely, an ADC converts an analog signal to a digital signal. A common application of converters would be microphones and headphones/earphones. 

For this lab experiment, we wil make use of a R-2R DAC to recreate a binary weighted DAC, such that the analogue output voltage is the weighted sum of the individual inputs. 

For the first part of the experiment, we will setup our working environment by downloading lab2.zip, uploading it to out csimcluster account under CMOS folder. Here we will extra the files we will be working with and go from there.

file:///C:/Users/dimapd1/Desktop/ee421_lab2/im0%20unzip%20lab2.png

Simply use the unzip command to extract the folder, then make sure to define the location of the folder by adding

it your library.

file:///C:/Users/dimapd1/Desktop/ee421_lab2/im1%20define%20lab2%20location%20lib.png

Afterwards, we can now start with virtuoso. Lets first start by taking a look at the demo or example circuit provided.

file:///C:/Users/dimapd1/Desktop/ee421_lab2/im2%20open%20demo%20circuit.PNG  file:///C:/Users/dimapd1/Desktop/ee421_lab2/im3%20demo%20circuit%20schematic.PNG

In the image above, we see the ADC - DAC then our output. Our source would be a pulse signal which would be converted to a digital signal, then converted again to analog. We would not be altering the original input, therefore, we expect the Vin and Vout simulation to be overlapping to one another.

Because this is an example given to us, we can load the state of the session and use that as our reference.

file:///C:/Users/dimapd1/Desktop/ee421_lab2/im4%20load%20state%20then%20sim.png  file:///C:/Users/dimapd1/Desktop/ee421_lab2/im5%20sim%20results.PNG  


In the simulation, we see that Vin and Vout are overlapping as expected. We didnt change anything, only transforming them from one form to another, therefore, we do not expect any losses. Note also, that we are using an ideal ADC - DAC for this example circuit.

Now that we have an idea on how the circuit works and supposed to behave. Lets start by making our own.
To start, lets make a copy of the ideal DAC. (image below, left side)

file:///C:/Users/dimapd1/Desktop/ee421_lab2/im6%20create%20DAC%20symbol%20via%20copy.PNG  file:///C:/Users/dimapd1/Desktop/ee421_lab2/im7%20DAC%20symbol%20schematic.PNG

Then, lets open and edit the symbol of the ideal DAC, the schematic would show looking like the image above, right side. This will be out guide on how to make our connections. As per the lab instructions, we will be removing the VDD, Verfp, and Vrefm pins. 

For the resistor, I made a copy of a previous example circuit, saving the copy under lab2 folder, and performing the edit from there.

file:///C:/Users/dimapd1/Desktop/ee421_lab2/r%20div%20copy.PNG

From here, we can start to make our 2R - R resistor. Since the lab experiment calls for a 10k. We will set the values of all resistors to 10k ohms. For the 2R resistor, we will recreate this by putting 2 resistors in series.

file:///C:/Users/dimapd1/Desktop/ee421_lab2/im8%20symbol%20created%20from%20new%20DAC.PNG

Make sure to always save and check your circuit. The last thing we want at this point, is to lose our progress. Likewise, when making simulations, be sure to save the state, no matter how many different states. The more simulation states you have, the more it makes sense to create meaningful titles, instead of state1, 2, 3, etc.

After creating the 2R-R schematic, lets make a box/symbol.
We do this by Create/cellview/from cell view...
create the symbol, choose where you want the pins to be. Here, you can start to visualize how you want your blocks to connect to one another.

file:///C:/Users/dimapd1/Desktop/ee421_lab2/im9%20DAC%20symbol%20copy.PNG

After doing so, lets make a new cell under lab 2. Here, insert the instance of the block symbols we created.

file:///C:/Users/dimapd1/Desktop/ee421_lab2/im10%20DAC%20symbol%20x10%20all%20conns%20no%20error.png  file:///C:/Users/dimapd1/Desktop/ee421_lab2/im10%20DAC%20symbol%20x10%20no%20conns.PNG

Again, save and check then create a block/symbol. Then lets make us of the symbol to start finalizing our DAC.

file:///C:/Users/dimapd1/Desktop/ee421_lab2/im12%20DAC%20x10%20conn%20create%20symbol.PNG  

In the new cell, where we insert the instance/block/symbol we created (image above), lets test our circuit to make sure it behaves the way we expect it to be.

file:///C:/Users/dimapd1/Desktop/ee421_lab2/im13%20almost%20there%20lmao_block%20design%20with%20conns.PNG

In our simulation, we can verify the time it takes for the capacitor to start charging, making use of the markers,

bindkey M and taking the difference, bindkey D.

file:///C:/Users/dimapd1/Desktop/ee421_lab2/im14%20delay%20simulation.PNG  

This also proves the delay which is part of the questions to be answered in our lab report. At this point, we can start to replace the ideal DAC in the demo circuit with our DAC. Do the the testing to verify that we are getting the same input as output and same sine wave/simulation as the ideal DAC. We can further prove the accuracy of our design, by testing it with different loads and proving via hand calculations and cadence simulations.

file:///C:/Users/dimapd1/Desktop/ee421_lab2/sim%20with%20square%20wave.png

Thank you for your time, cheers,

 

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