Lab 2 - EE421L 

Damian Aceves Franco

acevesfr@unlv.nevada.edu

09/01/2021 

  

Design of a 10-bit digital-to-analog converter (DAC) 

Pre-lab work

 

up load lab2.zip to MobaxTerm and unzip 

http://cmosedu.com/jbaker/courses/ee421L/f21/students/acevesfr/Labs/Lab%202/step1.JPG

then check to see if the design directory is in the cds.lib if now type it and save

http://cmosedu.com/jbaker/courses/ee421L/f21/students/acevesfr/Labs/Lab%202/step2.JPG

now run virtuoso and open the schematic 

http://cmosedu.com/jbaker/courses/ee421L/f21/students/acevesfr/Labs/Lab%202/step3.JPG
http://cmosedu.com/jbaker/courses/ee421L/f21/students/acevesfr/Labs/Lab%202/step4.JPG

then run ADE L

http://cmosedu.com/jbaker/courses/ee421L/f21/students/acevesfr/Labs/Lab%202/step5.JPG

     

The least significant bit (LSB) is determined my useing the equation 1LSB=(Vdd)/2^n. 

in this case the 1LSB is 5/2^10 = 4.88mV


 

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