Lab 3 - ECE 421L
Lab Description
The goal of this lab is to create the layout for the schematic of the Digital to Analog Converter (DAC) that wasPrelab
Back up the work done in lab 2.
Lab
Resistor:
We start the layout by drafting a layout of a 10kΩ n-well resistor. Using a sheet resistance of 800Ω/square,
To verify that the resistor fits the MOSIS design rules, we perform a DRC.
Now we can extract the resistor, and show it's value.
Resistor Module:
Now we move on to building the layout for the modules that were connected to create the DLC. Recall that the module's
schematic is the following.
We instantiate three of the n-well resistors. We keep the resistors parallel to each other in the layout view,
and connect them to match the schematic view by use of the metal1 layer.
The pins are then placed on the proper nodes.
After another DRC, we can perform an LVS to verify that the layout matches the schematic.
DAC:
Now we are ready to layout the DAC. Recall that the schematic for the DAC at this point chains 10
resistor modules together like so:
We instantiate 10 of the resistor modules in a layout view and connect them like so:
We then verify the layout matches the schematic for the DAC with a final LVS.
And that concludes the layout of the Digital to Analog Converter Schematic that was drafted
in lab2.