EE 421L – Digital IC Design Lab – Lab 1

Laboratory introduction, generating/posting html lab reports, installing and using Cadence

Author: Darryl Derico

E-Mail: derico@unlv.nevada.edu

8/28/2019

Lab Description:

For this lab, we were to go through the first part of Tutorial 1 provided on the Course Website.

This involves installing Cadence and getting familiar with using Virtuoso.

Prelab:

Created a CMOSedu account and proceeded to create a webpage.

Reviewed material on course website about editing webpages.

Lab:

Following the tutorial, I modified the .bashrc and cds.lib files and added the following lines to the respective files.

Then deleted the files divaDRC.rul, divaEXT.rul, and divaLVS.rul files to replace them with their respective extracted files from diva_rul_files.zip.

When the file setup was finished, I initiated Virtuoso to get started on making a schematic.

After creating a Tutorial Library and Cell, I built the indicated schematic and followed through with a check and save to ensure the schematic was in working order.

Once check and save passed without any errors, I launched ADE L to perform a simulation with the indicated input and output wires to be plotted and set the analysis to tran.

I created the netlist and ran after finishing set up, which resulted in the simulation and provided a graph of the voltages overtime as shown below.

For this lab, and all following labs, I will be backing up my work on Dropbox.