Index of /jbaker/courses/ee421L/f17/students/abera/lab8/chip7

 NameLast modifiedSizeDescription

 Parent Directory   -  
 tutorial6.JPG 2017-12-06 04:51 55K 
 ring osc and buffer ..>2017-12-06 04:51 66K 
 ring_osc_buffer.JPG 2017-12-06 04:51 29K 
 pmos layout.JPG 2017-12-06 04:51 81K 
 PMOS.JPG 2017-12-06 04:51 20K 
 parity checker layou..>2017-12-06 04:51 80K 
 parity checker.JPG 2017-12-06 04:51 43K 
 nor layout.JPG 2017-12-06 04:51 43K 
 NOR.JPG 2017-12-06 04:51 23K 
 nmos layout.JPG 2017-12-06 04:51 42K 
 nand layout.JPG 2017-12-06 04:51 28K 
 Nand.PNG 2017-12-06 04:51 5.0K 
 NMOS.JPG 2017-12-06 04:51 20K 
 inverter layout.JPG 2017-12-06 04:51 29K 
 inverter.PNG 2017-12-06 04:51 4.6K 
 chip7 schematic.PNG 2017-12-06 04:51 32K 
 chip7 layout.PNG 2017-12-06 04:51 36K 
 backup.JPG 2017-12-06 04:51 97K 
 25K_10K voltage divi..>2017-12-06 04:51 16K 
 25K_10K voltage divi..>2017-12-06 04:51 4.4K