Lab X - ECE 421L 

Chris Givens 

givensc2@unlv.nevada.edu

8/30/2015 
Lab 2: 10-bit ADC

 

Prelab:

The prelab led  through the steps to create a new library and use it to run a simulation of an ideal 10-bit Anolog-to-Digital Converter connected to an ideal 10-bit Digital-to-Analog converter.

 

Below is the schematic:

SimSchem.JPG

 

Below is the simulated output:

SimOut.JPG

 

Now the task is to create a layout that mimics the ideal DAC using 10k Ohm n-well resistors.

The topology that will be used for this lab is and R-2R topology:

l2_4.jpg

The shematic:

Screen%20Shot%202015-09-14%20at%207.46.22%20AM.png

2x 10k Ohm resistors were used in series for each value of 2R.

Below is the layout of n-well resistors:

Screen%20Shot%202015-09-14%20at%207.46.32%20AM.png

 

 Below is the output of just the least significant bit (LSB):

Screen%20Shot%202015-09-14%20at%207.55.00%20AM.png

 

and the output of the most significant bit (MSB):

Screen%20Shot%202015-09-14%20at%207.56.12%20AM.png

 

Below is the associtated symbol for this circuit:

Symbl.JPG