Lab 4

IV characteristics and layout of NMOS and PMOS devices in ON's C5 process

Adrian Smallwood
October 6, 2014

Generating I-V Curves

NMOS ID vs VDS

We first generate the ID vs VDS curves of an NMOS. To do this we sweep VDS from 0 to 5 V, at various values for VGS. Our simulation will consist of a dc sweep and parametric analysis. Here is our circuit

Now we will set our simulation settings for the dc sweep and parametric analysis (VGS is the parameter).

Our first set of curves are shown below.


NMOS ID vs VGS

We will now generate the ID vs VGS curves of an NMOS. To do this we set VDS to an arbitrary value of 100mV and perform dc analysis at various values for VGS. Our simulation will consist of a parametric analysis. Here is our circuit

Now we will set our simulation settings for the dc sweep and parametric analysis (VGS is the parameter).

Now we will set our simulation settings for the dc sweep and parametric analysis (VGS is the parameter).