Lab 1 - EE 421L 

Authored by Henry Chan,

chanh6@unlv.nevada.edu

8th September 2014

   

In this lab (Lab 1) I will go through Tutorial 1 and post images and screenshots generated along the way as well as providing brief descriptions of the process. My method for backing up future lab documentation will also be discussed at the very end of this report.

  

Downloading Cadence: I started by downloading the NCSU Cadence Design Kit from  http://www.eda.ncsu.edu/wiki/NCSU_CDK

http://cmosedu.com/jbaker/courses/ee421L/f14/students/chanh6/lab1/cadence%20download.JPG

 

I unzipped the file in my home directory and added the following lines to my .bashrc file

 

export SPECTRE_DEFAULTS=-E
export CDS_Netlisting_Mode=Analog
export CDS_LOAD_ENV=CWDElseHome
export CDK_DIR=$HOME/ncsu-cdk-1.6.0.beta 

 

Next, I re-sourced the .bashrc file using the command: ". .bashrc" (without quotes).

I then created a design directory called CMOSedu.

After copying everything from $HOME/ncsu-cdk-1.60.beta/cdssetup into $HOME/CMOSedu, I made cdsinit, simrc, and cdsenv hidden in the CMOSedu directory

 

I then updated some library definitions in my cds.lib file to include the correct paths:

 
 
DEFINE analogLib /usr/cadence/IC615/tools.lnx86/dfII/etc/cdslib/artist/analogLib
DEFINE functional /usr/cadence/IC615/tools.lnx86/dfII/etc/cdslib/artist/functional
DEFINE sbaLib /usr/cadence/IC615/tools.lnx86/dfII/etc/cdslib/artist/sbaLib

 

After further configuration and setup dealing with default simulator specifications and rule checking files, I remotely opened Cadence using MobaXterm.

From here I created some new schematics and symbols to represent a 10k resistor divider:

 

http://cmosedu.com/jbaker/courses/ee421L/f14/students/chanh6/lab1/library%20manager.JPG

 

 

10k resistive divider schematic

http://cmosedu.com/jbaker/courses/ee421L/f14/students/chanh6/lab1/r_10k_divider_schematic.JPG

 

 

10k resistive divider symbol

http://cmosedu.com/jbaker/courses/ee421L/f14/students/chanh6/lab1/r_10k_divider_symbol.JPG

 

 

The results of the simulation appear below:

http://cmosedu.com/jbaker/courses/ee421L/f14/students/chanh6/lab1/simulation.JPG

 

 

After following the tutorial, I have successfully produced a working circuit schematic and have become very familiar with the cadence tools as well as the kompozer application to complete further lab reports easily.

 

Backups:

For all labs, I plan on using a cloud based solution to create backups of my work. This involves saving files and images to Microsoft's Onedrive system so that I may access the material from anywhere with an internet connection.

 

 

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