Index of /jbaker/courses/ee421L/f14/students/baldivi3/Project

 NameLast modifiedSizeDescription
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 ALU_1bit_layout.JPG 2014-12-01 09:22 172K 
 ALU_1bit_netlistsmat..>2014-12-01 09:22 60K 
 ALU_1bit_schematic.JPG 2014-12-01 09:22 151K 
 ALU_1bit_symbol.JPG 2014-12-01 09:22 27K 
 ALU_8bit_AandB_sim_o..>2014-12-01 09:22 236K 
 ALU_8bit_AandB_sim_o..>2014-12-01 09:22 160K 
 ALU_8bit_AandB_sim_s..>2014-12-01 09:23 108K 
 ALU_8bit_AminusB_sim..>2014-12-01 09:23 232K 
 ALU_8bit_AminusB_sim..>2014-12-01 09:23 145K 
 ALU_8bit_AminusB_sim..>2014-12-01 09:23 87K 
 ALU_8bit_AorB_output..>2014-12-01 09:23 185K 
 ALU_8bit_AorB_output..>2014-12-01 09:23 143K 
 ALU_8bit_AplusB_sim_..>2014-12-01 09:23 195K 
 ALU_8bit_AplusB_sim_..>2014-12-01 09:23 141K 
 ALU_8bit_layout.JPG 2014-12-01 09:23 119K 
 ALU_8bit_netlistsmat..>2014-12-01 09:23 61K 
 ALU_8bit_netlistsmat..>2014-12-01 09:23 18K 
 ALU_8bit_schematic.JPG 2014-12-01 09:23 50K 
 ALU_8bit_symbol.JPG 2014-12-01 09:23 29K 
 ALU_AplusB_schematic..>2014-12-01 09:23 97K 
 AandB_layout.JPG 2014-12-01 09:22 106K 
 AandB_netlisrsmatch.JPG2014-12-01 09:22 94K 
 AorB_layout.JPG 2014-12-01 09:23 92K 
 AorB_netlistsmatch.JPG 2014-12-01 09:23 122K 
 AorB_sim_schematic.JPG 2014-12-01 09:23 95K 
 FA_layout.JPG 2014-12-01 09:23 251K 
 MUX_layout.JPG 2014-12-01 09:23 92K 
 MUX_netlistsmatch.JPG 2014-12-01 09:23 96K 
 Project.zip 2014-12-01 09:23 2.6M 
 inverter_layout.JPG 2014-12-01 09:23 37K 
 project.htm 2014-12-01 09:23 17K 
 project_EB_F14.zip 2014-12-01 09:23 749K 
 zipgoogle.JPG 2014-12-01 09:23 47K 
 zipimage.JPG 2014-12-01 09:23 10K