*** SPICE deck for cell RC_sim{sch} from library CMOSedu_8
*** Created on Sat May 26, 2007 19:56:03
*** Last revised on Sat May 26, 2007 19:59:34
*** Written on Sat May 26, 2007 19:59:37 by Electric VLSI Design System, 
*version 8.05l
*** Layout tech: mocmos, foundry MOSIS
*** UC SPICE *** , MIN_RESIST 4.0, MIN_CAPAC 0.1FF
.OPTIONS NOMOD NOPAGE

*** CELL: 10k_n_well{sch}
.SUBCKT _10k_n_well L R

* Spice Code nodes in cell cell '10k_n_well{sch}'
R1 L R 10k
.ENDS _10k_n_well

*** CELL: 100f_cap{sch}
.SUBCKT _100f_cap P1 P2

* Spice Code nodes in cell cell '100f_cap{sch}'
C1 P1 P2 100f
Cb P1 GND 20f
.ENDS _100f_cap

*** TOP LEVEL CELL: RC_sim{sch}
X_10k_n_we@0 In Vout _10k_n_well
X_100f_cap@0 gnd Vout _100f_cap

* Spice Code nodes in cell cell 'RC_sim{sch}'
Vgnd GND 0 DC 0
Vin in 0 DC 0 PULSE 0 5 3n 10p
.tran 10ps 10ns
.END