*** SPICE deck for cell Inv_20_10{sch} from library CMOSedu_1
*** Created on Tue May 22, 2007 12:37:00
*** Last revised on Tue May 22, 2007 12:49:14
*** Written on Tue May 22, 2007 12:49:21 by Electric VLSI Design System, 
*version 8.05l
*** Layout tech: mocmos, foundry MOSIS
*** UC SPICE *** , MIN_RESIST 4.0, MIN_CAPAC 0.1FF
.OPTIONS NOMOD NOPAGE

*** TOP LEVEL CELL: Inv_20_10{sch}
Mnmos@0 Out In gnd gnd NMOS L=0.6U W=3U
Mpmos@0 vdd In Out vdd PMOS L=0.6U W=6U
Vin In gnd DC 0V

* Spice Code nodes in cell cell 'Inv_20_10{sch}'
VDD VDD 0 DC 5
VGND GND 0 DC 0
.include C:\Electric\C5_models.txt
.options post
.DC Vin 0 5 1mV
.END