# header information:
HCMOSedu_1|8.07g

# Views:
Vicon|ic
Vschematic|sch

# External Libraries:

Lspiceparts|spiceparts

# Technologies:
Tmocmos|ScaleFORmocmos()D300.0|mocmosNumberOfMetalLayers()I3

# Cell Inv_20_10;1{sch}
CInv_20_10;1{sch}||schematic|1179859020546|1179859754859|
Ngeneric:Facet-Center|art@0||0|0||||AV
NGround|gnd@0||3.75|-6.75||||
NGround|gnd@1||-5.75|-7.5||||
Ispiceparts:DCVoltage;1{ic}|in|D5G1;X-3;Y-0.25;|-5.75|-1|||D5G4;|ATTR_Voltage(D5G0.5;N)S0V
NTransistor|nmos@0||1.75|-1.75|||R||ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D10.0|SIM_spice_model(D5G0.5;X-1;Y-1.5;)SNMOS
NWire_Pin|pin@0||0|3.75||||
NWire_Pin|pin@1||0|-1.75||||
Ngeneric:Invisible-Pin|pin@2||9.5|1|||||SIM_spice_card(D5G0.5;)S[VDD VDD 0 DC 5,VGND GND 0 DC 0,".include C:\\Electric\\C5_models.txt",.options post,.DC Vin 0 5 1mV]
NWire_Pin|pin@3||0|2.5||||
NTransistor|pmos@0||1.75|3.75|||R|2|ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D20.0|SIM_spice_model(D5G0.5;X-1;Y-1.5;)SPMOS
NPower|pwr@0||3.75|8.25||||
Awire|In|D5G1;||900|pin@3||0|2.5|pin@1||0|-1.75
Awire|Out|D5G1;||900|pmos@0|s|3.75|1.75|nmos@0|d|3.75|0.25
Awire|net@0|||900|nmos@0|s|3.75|-3.75|gnd@0||3.75|-4.75
Awire|net@2|||2700|pmos@0|d|3.75|5.75|pwr@0||3.75|8.25
Awire|net@3|||0|pmos@0|g|0.75|3.75|pin@0||0|3.75
Awire|net@5|||1800|pin@1||0|-1.75|nmos@0|g|0.75|-1.75
Awire|net@6|||2700|gnd@1||-5.75|-5.5|in|minus|-5.75|-4.5
Awire|net@7|||900|pin@0||0|3.75|pin@3||0|2.5
Awire|net@8|||1800|in|plus|-5.75|2.5|pin@3||0|2.5
X