Fall 2004 lecture notes for EE 5/418 Memory circuit design
December 9 – Lec29_5418.pdf – review for final exam
December 7 – Lec28_5418.pdf – digital delay-locked loops
December 2 – Lec27_5418.pdf – selecting loop filter components, lock and pull-in range, design of source-coupled oscillators
November 30 – Lec26_5418.pdf – discussions on PLL design
November 25 – no class (Thanksgiving break to work on projects)
November 23 – no class (Thanksgiving break to work on projects)
November 18 – Lec25_5418.pdf – clock recovery, the Hogge PD
November 16 – Lec24_5418.pdf – estimating delay, Quiz 6
November 11 – Lec23_5418.pdf – static phase error, dead zone, voltage generators
November 9 – Lec22_5418.pdf – various VCO topologies, linearizing the VCO, differential topologies
November 4 – Lec21_5418.pdf – charge pump PD and gain, charge pump PLLs, ring oscillators,
November 2 – Lec20_5418.pdf – VCO gain, PLL transfer function
October 28 – Lec19_5418.pdf – intro PLLs and their uses (frequency synthesis, clock recovery, synchronization), VCO gain, XOR PD
October 26 – Lec18_5418.pdf – sampling reference and signal, more sensing with DSM
October 21 – Lec17_5418.pdf – CMOS imagers and sensing, Quiz 5
October 19 – Lec16_5418.pdf – resistive memories, sensing resistive memories using DSM
October 14 – Lec15_5418.pdf – clock doubler, more DSM sensing
October 12 – Lec14_5418.pdf – column decoding, intro to using delta-sigma modulation (DSM) for sensing
October 7 – Midterm exam
October 5 – Lec13_5418.pdf – dynamic power dissipation, ground bounce and discussions
September 30 – Lec12_5418.pdf – Take home and Quiz 4
September 28 – Lec11_5418.pdf – basic sensing in Flash, programming and erasing in an array of floating gate memory cells
September 23 – Lec10_5418.pdf – floating gate memory (Flash), channel hot electrons (CHE), Fowler-Nordheim Tunneling (FNT), programming and erasing the cell
September 21 – Lec9_5418.pdf – I/O, getting data out of the array, SRAM, 6T and poly-R cells, Quiz 3
September 16 – Lec8_5418.pdf – more sensing discussions, Quiz 2
September 14 – Lec7_5418.pdf – sense amp design and basic considerations
September 9 – Lec6_5418.pdf – power, architectures, addressing and sizes, column addressing
An example DRAM datasheet is located here.
September 7 – Lec5_5418.pdf – power, sensing, delay through row lines, RAS/CAS and addressing, Quiz 1
September 2 – Lec4_5418.pdf – arrays, n and p-sense amps, dummy bit lines, layout of mbit, folded array architectures
August 31 – Lec3_5418.pdf – n-sense amp, EQ circuits, pre-charging
August 26 – Lec2_5418.pdf, l2_mem1.cir, l2_mem2.cir – effective capacitance, delay calculation examples, RC circuits, bitline capacitance, charge sharing
August 24 – Lec1_5418.pdf, l1_mem1.cir, l1_mem2.cir, table_5418.pdf – review of digital design, on and off currents, effective digital resistance, oxide capacitance