Lab 2 - ECE 421L 

Author: Matthew Weishaar

weishm1@unlv.nevada.edu

Date: September 2, 2021 

 

Lab description and goals:

Learn how to create a 10-bit DAC

 

Prelab:

We download the lab2.zip folder and upload it to our CMOSedu folder to use in Cadence and defining it in cds.lib. After that we simulate the Ideal DAC and figuring out how the input and output relate to one another.
After simulating we should get this result:

 
 We can determine the Least Significant Bit (LBS) by using the equation LDS = VDD/2^n,  with n  being the amount of bits.

 

Lab:

 
In this lab we will be creating a 10-bit DAC using this image as reference:


 

First off, we will create a voltage divider similar to the image above, using two resistors in series for 2R.

 


 Note: Instead of 1k the resistors should be 10k, this was fixed later in the night

 

We then create a symbol using this voltage divider.

Create -> Cellview -> From Cellview, then OK.

 

 

Following the schematic we should end up with this schematic and symbol:


   

 

Next, we will test our DAC delay using a 10pF capacitor.

We will first predict our delay with the following equation:

 

Td = 0.7RC = .7 * 10K * 10pF = 70ns

 


 

Now that we know our delay is correct, we will copy the Ideal DAC from our prelab, but replace the 10-bit DAC with the one we have created and run a simulation.


 

Upon our first test the simulation didn't finish to 1ns, so we change some settings in our simulator.

Simulation -> Options -> Analog, change the settings as seen below.


 


Run the simulator once more and we end up with this:


As you can see, there are a few areas that are a bit weird, but overall it is very similar to what we saw in the prelab.

 

Now that we know our 10-bit DAC is working correctly, we will test it under different loads (R, C, RC) and see the result.


10K resistor load:

 

 

With a 10K load, the output was reduced to 2.5V from 5V


10pF capacitor load:


 

With a 10pF load, the output smooths out, but it lags a bit and the output is lower.

10K and 10pF RC load:

 


Under both a 10K and 10pF load the output both smooths out and reduces to 2.5V, but it still lags a bit.

 

In a real circuit the switches in the example are implemented with transistors, if the resistances of the switches isn't small compared to R, then our output voltage will drop.

 

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