Lab 2: EE 421L

Design of a 10-bit digital-to-analog converter (DAC) 
                     

Authored by: Kaylee Spencer

Email: spenck3@unlv.nevada.edu

Due: 09/11/2019

                     

Lab Description: This lab is meant to teach us how to implement a 10-bit digital-to-analog converter (DAC) using n-well resistors.

                     

Prelab

Part 1

                     

Before starting the prelab, we needed to download lab2.zip, upload the file to our CMOSedu folder, unzip it and add it to our cds.lib folder in the design directory. We then had to define it in the directory using the following command"DEFINE lab2 $HOME/CMOSedu/lab2". Then we were able to run Cadence and open the schematic view of the cell "sim_Ideal_ADC_DAC" under our lab2 folder in the Library Manager.

                     

1.png

                     

Once we opened the schematic (shown above), we then launched the simulation by selecting Launch -> ADE L in the schematic editor window and then Session -> Load State -> Cellview -> OK in the next window. 

                     

2.png

                     
After running the simulation, we got the transient response shown above. I changed the color of "Vout" to blue and the background to white to have a clearer view of the waveform.
                     

Part 2

                     
3.png
                     
As you notice, in the original waveform, the steps of Vout are very hard to see. When I decreased the vsin voltage from 2.5V to 10mV, it allowed us to clearly see the steps in Vout. The relationship between ADC and DAC is that they do the opposite of each other (analog-to-digital converter vs. digital-to-analog converter). Therefore, the relationship between Vin and B[9:0] is that the ADC gets the input (Vin), converts it to binary and assigns each 10-bit binary number to a pin (B[9:0]). Then, the DAC receives the binary numbers and converts it to the output (Vout) waveform.
                     

Part 3

                     

                     
We notice in the schematic above that the least significant bit (LSB) is shown by the parts of the steps that fall under the Vin sine wave. To calculate the LSB, we simply use the equation above, where VDD is the voltage and N is the number of bits. In this case, the LSB is 4.88mV. 
                     

Lab

Part 1
                     

                     
First, I designed a 10-bit DAC using an n-well resistance of 10k-ohms.
                     
Part 2
                     

                     
Using my 10-bit DAC, I created a symbol that could be used in other schematics. I was able to do this by clicking Create, then clicking Cellview, then clicking From Cellview.
                     
Part 3
                     

                     
I then created a new schematic using my newly created symbol. I grounded all input terminals except B9, I connected B9 to a pulse source and let VDD = 5V. I then connected a 10pF load.
                     
Hand Calculations:
                     
0.7 * 10pf * 10k = 70ns
                     
 
                     
I then ran a simulation to verify my hand calculations.
                     
Part 4
                     

                     
Lastly, all I needed to do was to verify my DAC was done correctly. I did this by replacing the original DAC in the sim_Ideal_ADC_DAC schematic with my newly created one. I then ran a simulation, shown below, and compared my results to the results of the original.
                     

                                        
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