Lab 2 - ECE 421L 

Lizz Heider

9/4/2019

  

Prelab:

Download the lab2.zip file

Unzip file and add it to cds.lib file

Open Cadence > Library Manager > “lab2” library (open)

Open cell “sim_ideal_ADC_DAC”

This cell is an ideal 10-bit Analog to Digital Converter and Digital to Analog Converter

Here is the schematic:

 

I reviewed function of the 10bit ADC and DAC and now we can run the transient response:

(Process: Launch > ADE L > Session > Load State > Cellview > OK)

 

Here is the transient response of the schematic:

 

How is the input voltage Vin, related to B[9:0] and Vout?

 

B[9:0] is a 10-bit binary representation of the value of the source voltage being read from Vin. B[9:0] is a bus, and each wire of the bus represents a bit of the 10-bit binary representation of Vin. The ADC receives an analog input and converts that into binary code.

Then the DAC takes that binary code and converts it to an analog waveform, with its resolution being based on the number of bits.

The staircase waveform is the output Vout, an analog wave.

 

 

 

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