Lab 3 - ECE 421L
Author: David Silic
Email: silic@unlv.nevada.edu
EE421L
For the prelab I finished the tutorial 1.
The tutorial covered the layout of a simple resistor divider shown below using a symbol view:
The tutorial covered the layout of n-well resistors, which is covered in more detail in the
lab report below.
Here
we see the finished resistor divider comprised of two 10k
resistors
completing tutorial 1.
Lab report:
This lab will show how to lay out the 10-bit DAC circuit we designed in our previous lab, lab2.
The first step to design our layout is to make a 10k resistor as the DAC circuit is comprised of mainly 31 10k resistors. In order to size our resistor we use the simple equation:
where l is the length in um and w
is the width or height in um.
Rsquare is constant which is roughly 819, and we know our width must be 4.5 um because of our design process. Thus from simple algebra we get the following:
Which gives us the dimensions for
our n-well 10k resistor
and
the following resistor.
Note we use the values of 56.1 to be on
the 0.15 grid.
We note we can measure the
dimensions of the resistor using the ruler tool,
Accessible using
the 'k' key.
Now we must take our schematic for the DAC and may it into a layout.
First we will stack all 31 resistors on top of each other leaving enough room as the design rules specify. Than we will draw metal 1 paths to connect the proper nets together.
Note the longer trace represents the node which connects to three resistors while the resistor which get crossed is the left most part of the 2R leg connecting to b0. The nets can be seen clearly in the schematic:
Once the metal connections are made we have to add pins to represent the inputs, outputs, and gnd.
Note the metal sticking out
horizontal on the extracted view.
The pads are also visible on the
view of the entire layout below:
Note the repeating pattern continuing from top to bottom.
The final step is to run DRC and LVS checks on the layout:
DRC checks out!
And
the LVS checks out showing matching net-lists between the schematic
and
the layout.
Zip file containing design files HERE
