Lab 2 - ECE 421L
dahanj1@unlv.nevada.edu
After
downloading lab2.zip, I defined the lab2 library in cds.lib. Afterwards, I
initiated virtuoso to open the ADC to DAC schematic (as seen below).
Next, I
launched ADE L and loaded the spectre1 session to simulate the schematic. The
waveform is as shown below.
In this
simulation I set Vdd to 4V which resulted in the
following waveform. Mathematically, the LSB can be obtained by 
( or 
). By setting Vdd to 4V, the maximum output for the DAC became 3.996V
(which can be obtained by the formula 
).
Post-lab:
Here is the
full schematic view of my DAC.
Closeup view
of the DAC.
·
Solving for
output resistance:
Calculations
·
Delay:
Modified
schematic.
Notice that Vout goes to 2V instead of 4V. This is because after the
circuit is simplified, there is a 2R in parallel with a 2R
which creates a voltage divider (in this case halving the input
voltage).
Calculations
·
Creating a
symbol:
First, I
copied the symbol for Ideal_10-bit_DAC to the cell Mydesign_10-bit_DAC.
Similarly, I
copied the schematic for my 10-bit DAC (located at the cell named
my_10-bit_DAC) to Mydesign_10-bit_DAC.
Below is the
cell view with the schematic and the symbol for my 10-bit DAC.
·
Simulations:
When
simulating without a load only a third of the full waveform is shown;
nevertheless, it is nearly identical to the simulation from sim_Ideal_ADC_DAC.
The presence
of a 10kΩ load cut the maximum value of Vout by
half. Additionally, the Voffset is also halved as can
be seen by the waveform below. This is because the load resistor creates a
voltage divider, dividing the Voffset and Vin (in this case they are halved because I chose a 10kΩ
resistor).
The addition
of a 10pF load tremendously alters the waveform. Vout
no longer has steps; this is most likely because capacitors have to charge up,
meaning that Vout will take about 5RC time constants
before actually becoming Vin. This confirms our
observation from when we tried to find the delay.
Connecting the
DAC to a parallel load of a 10kΩ resistor and a 10pF capacitor resulted
in a waveform which combines the properties of the previous waveforms. To
elaborate, the waveform’s amplitude and offset is halved (like when the 10kΩ
resistor was the only load) and the waveform no longer has steps (exactly like
when the 10pF capacitor was the load).
·
Switches:
In real
circuits, the switches at the output of an ADC are implemented with
transistors. If the resistances of the switches are not small then they would affect
the total output resistance. One consequence would be that the delay is
increased.