Lab 2: Design of 10-bit digital to analog converter (DAC) - EE 421L 

Author: Mario Verduzco

Email: Verdum1@unlv.nevada.edu

09/13/17 

  

 

 

Pre-lab:

 

Lab description:

 

Experimental Results:

 

· Back-up all of your work form the lab and the course.

· Read through this entire lab write-up before doing the pre-lab

· Download and upload the Ideal ADC and DAC from CMOSedu

· Simulate and describe the operation of both the ADC and DAC

The objective of this lab is to implement a 10-bit DAC using n-well resistors using a design topology from the CMOS book.

Exercise #1 - Design the 10-bit DAC using 10k Resistors and determine the output resistance

DAC topology from the CMOS book

10-bit DAC using 10k resistors

· In a real circuit the switches seen above (the outputs of the ADC) are implemented with transistors (MOSFETs). Discuss what happens if the resistance of the switches isn't small compared to R.

10-bit Ideal ADC to DAC

The Analog to digital converter works by taking a smooth analog signal as an input and converting it to digital steps that are each related to a bit. The Digital to analog converter works in the opposite direction by taking a digital signal as an input and outputting an analog signal. This is done by using a series of voltage dividers that are in parallel with each bit being an input.

10-bit Ideal ADC to DAC Simulation showing the least significant bit

10-bit Ideal ADC to DAC Simulation

10-bit Ideal DAC Least significant bit

Exercise #2 - Delay through the 10-but DAC

10-bit DAC driving a 10pF load

10-bit DAC driving a 10pF load Simulation

Exercise #3 - Simulation of ideal ADC to designed DAC driving a variety of loads

10-bit ADC to DAC driving no load

10-bit ADC to DAC driving no load simulation

10-bit ADC to DAC driving a 10pF load

10-bit ADC to DAC driving a 10k load simulation

10-bit ADC to DAC driving a 10k load

10-bit ADC to DAC driving a 10pF load simulation

10-bit ADC to DAC driving a 10pF and 10k load

10-bit ADC to DAC driving a 10pF amd 10k load simulation

Since the load on the DAC is a 10k load and that is equal to the output resistance, the Vout will be subjected to a voltage divider cutting the voltage in half.

In a real circuit if the resistance of the switches are not small compared to R then the parallel combination of the Voltage dividers will not be accurate therefore not displaying the right voltage respective to the bit inputs.