Lab 1 - ECE 421L 

Authored by Byron Gorsuch,

gorsuch@unlv.nevada.edu,

September 4, 2017  

Lab description

This lab is a general introduction to creating and verifying schematics using Cadence's Virtuoso program, as well as a demonstration that I will perform regular backups of my work

using both my flash drive and Google drive.

The following schematic was created:

                           Figure 1: Schematic of Voltage Divider 

By running a transient response with a 1 second stop time, the following output was shown:

                                     Figure 2: Transient Repsonse Result

   
The information from this lab, as well as all future labs will be backed up to both my thumbdrive and Google drive

I compress the folder containing my working directory into a ZIP file.

                             Figure 3: Compressing Files

I upload the ZIP file onto my google drive.

                                        Figure 4: Uploading to Google Drive

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