Project – Detector Circuit

Zach Nelson

nelsoz1@unlv.nevada.edu

11/16/2016

  

For this project we needed to design a circuit that could detect a specific sequence of numbers.

 

Sequence: 101011

 

The first step in designing this detector circuit was designing the D-Flip Flop component of the circuit.

 

I started off by creating the a transmission gate using a 6u/0.6u PMOS and NMOS. This Transmission Gate is used alongside inverters to build a D-Flip Flop.

 

For my inverter I used the 6u/6u Inverter used in Lab 7.

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/inverter_schem.JPG

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/inverter_sym.JPG

 

I went on to layout my inverter as well


http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/inverter_layout.jpeg       http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/inverter_drc.jpeg

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/inverter_lvs.jpeg

 


After designing these I went on to build my D Flip Flop from Figure 13.22 in the textbook and created a symbol for it.

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/dff_schem.JPG

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/dff_sym.JPG

To ensure that my design worked I needed to test my D Flip Flop.

 


 http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/dff_sim_schem.JPG

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/dff_sims.JPG


To make it easier I created a Transmission gate symbol and implemented it in the D-Flip Flop

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/tgate_schem.jpeg  

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/tgate_layout.jpeg

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/tgate_drc.jpeg

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/tgate_lvs.jpeg


I then instantiated the Transmission Gate into my D Flip Flop Design

 

Now that I had a proper operating D Flip Flop I went to layout the D Flip Flop

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/dff_layout.jpeg

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/dff_drc.jpeg

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/dff_lvs.jpeg


I needed to construct a 6 input NAND gate to determine if the input is correct or incorrect. I created the schematic and symbol for it.

 


http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/nand6_schem.JPG

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/nand6_sym.JPG

 

I then went on to layout the NAND gate

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/nand6_layout.jpeg

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/nand6_drc.jpeg

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/nand6_lvs.jpeg


 

Now that I have all components necessary to build my detection circuit, I can move on to designing it.

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/detector_sim_schem.JPG

 

I ran a simulation to confirm that the Detector did in fact detect the proper sequence.

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/detector_sims.JPG

 


I also built a symbol for the schematic (An eye is appropriate because the detector can see allllllll the input)

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/detector_sym.jpeg

 

After building the schematic I went on to layout the detector

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/detector_layout.jpeg

 

It passed DRC and LVS

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/detector_drc.jpeg

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/detector_lvs.jpeg

 

I also simulated my extracted layout of the detector to ensure proper operation

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/detector_sim_schem.jpeg

 

First I simulated a correct input, there is a small glitch but I believe that to be due to previous state input

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/extracted_sims1.jpeg

 

I also simulated incorrect input.

 

http://cmosedu.com/jbaker/courses/ee421L/f16/students/nelsoz1/project/extracted_sims2.jpeg


I linked my detector library below.

  

Detector Library

 

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