Lab 5 - ECE 421L 

Authored by Dominique Anguiano,

Email: anguian3@unlv.nevada.edu

September 28, 2016

The files used in this lab can be found here

 

Pre Lab

 

As we have done since lab2, we begin the weekly lab by backing up all of our files from the lab and the class.  Once these are uploaded, we then proceed through Tutorial 3 which has us make an inverter using the NMOS and PMOS devices we implemented in the prior lab.  The entire prelab covered this creation of the inverter and this inverter would be used in the Lab for this week.

Lab Report 
  

1) Draft Schematics, Layouts and Symbols for the two inverters

    We begin the lab this week by creating the schematics for two inverters with different sizes.  The first inverter has a size of 12u/6u which are the widths of the PMOS and NMOS devices respectively.  The second inverter is four times the size at 48u/24u.  The schematics for these two inverters can be seen below.  The 48u/24u inverter (seen on the right) has a multiplier of 4, which is what makes it 48u/24u despite the reported widths on the schematic being 12u/6u for the PMOS and NMOS device repectively.

 

 Schematic_Inverter.PNG   Schematic_Inverter_x4.PNG

 

 Now that we have these two schematics, we then create a symbol for each one and document the sizes on them with a label.

 

Symbol_Inverter.PNG   Symbol_Inverter_x4.PNG

  

Now that we have that out of the way, we then create a layout for each inverter.  Each layout was created so that it would look similar to the schematic and the devices would be easy to identify based on their position in the layout.  The 12u/6u inverter was created in the prelab and is shown below. The 48u/12u inverter is created in a similar fashion to this 12u/6u inverter except that a multiplier of 4 was used when creating it.  The LVS was also ran on each inverter after the layout was extracted and the results can also be seen in the images.

 

Layout_Inverter.PNG  Layout_Inverter_x4.PNGLayout_Inverter_x4.PNG

  

 

The extracted view of each inverter can be seen below.  The left image is the 12u/6u inverter and the right image is the 48u/24u inverter. 

  

 Extracted_Inverter.PNG     Extracted_Inverter_x4.PNG

 

 

 2) Using SPICE simulate the operation of both of the inverters

    The simulations required for the lab this week, require us to add a capacitive load that changes between 100 fF, 1pF, 10pF, and 100pf.

The first set of simulations will be conducted on a 12u/6u inverter in the circuit shown below.  The results from this simulation can also be seen below.

 

Simulation_Schematic_Inverter.PNG  Results_Inverter.PNG



The second set of simulations for the 48u/24u inverter along with its circuit can be seen below.
 
 Simulation_Schematic_Inverter_x4.PNG  Ultra_Simulation_x4.PNG
 

Each of these simulations show that the larger capacitors take longer to discharge, with the largest not being able to discharge completely before the the pulse switches back to 5v.  By using a larger inverter, the current that flows throughout the circuit can be greater and thus allows the capacitor to discharge more quickly.  This difference in the discharge rate can be seen when comparing the simulations between the two inverters.  The difference for the largest two capacitors is the greatest with the 10pf capacitor (green line) being able to almost discharge completely with the larger inverter whereas it can barely discharge halfway with the smaller inverter.

How the simulations were obtained

The load capacitor in the schematics have a value of 'c' for its capacitance.  This is because we will be using it as a variable to conduct the simulation and vary the capacitance between the four required values.  The simulation ran on the each circuit is a transient analysis that runs for 25ns.  This simulation is run in the ADE and has A and Ai set to be plotted.  In addition to this, another window accessed by going to Tools > Parametric Analysis is opened.  Here in this window, we can set the capacitance of the load to change between the four required values by using the settings shown in the window below.

 

Transient_Setup.PNG

 

3) Use UltraSim simulate the operation of both of the inverters

    Using UltraSim instead of SPICE is a fairly simple process as it only involves changing one setting in the ADE.  Once in the ADE a user must simplly go to Setup -> Simulator/Directory/Host and select UltraSim as the simulator.  When this simulator is selected, it can be seen at the bottom-right of the ADE window.  With UltraSim selected, proceeding with the simulation is the same as usual and only requires that the model libraries be selected again.

 

 UltraSIm_ADE.PNG

 The schematics for both of the inverters along with their UltraSim simulation can be seen below.

 

 Simulation_Schematic_Inverter.PNG   Ultra_Simulation.PNG

 

 

 Simulation_Schematic_Inverter_x4.PNG   Ultra_Simulation_x4.PNG

 

 

 As we can see, the UltraSim simulation produces similar results compared to the spectre simulator used in the first set of simulations.




 

  

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