Lab 5 - EE 421L 

Authored by Your Russ Prado, prador@unlv.nevada.edu

10/3/2015

  

Design, layout, and simlution of a CMOS Inverter

Pre-Lab:

For this lab we will go steps found in Tutorial 3

 

Post-Lab:

 

Part 1:

We will start of this lab exercise by creating the schematics of two inverters. After creating the schematics, don't forget to check save the schematics to make sure there are no errors.

  1. 12u/6u (PMOS width/NMOS width)
  2. 48u/24u (here we will use 12u/6u with a multiplier, M=4)
     

Part 2:
Next we will create the symbols for each of the invertors. Make sure display the pin names to ensure that the names are in the right order. Don't forget to Check Save!!!

 

Part 3:

Here will we be creating the layouts for each the inverter schematics.

First will be the 12u/6u inverter. The parts we will need can be found the NCSU_TechLib_ami06 library. These parts will be nmos, pmos, ntap, ptap, and m1_poly. When linking cell and inserting pin names, use metal1.

Once you have completed the layout, DRC it to make sure there are no errors. Check Save after the DRC.

With no errors, extract the layout. Then we will LVS the schematic and extracted layout to make sure they are identical.

Part 4:

We will now move on to follow the steps of Part 3 for the 48u/24u Inverter.

For this layout, we will change the multiplier value for the nmos and the pmos to satisfy the parameters of this inverter.


Layout:

Extracted:

LVS:

 

Part 5:

With the schematics and layouts of each of the inverters completed, we will simulate each of the inverters to compare their different characteristics. The following, will be the schemcatics we will be using here:


In setting up the simulations, we need to be using the ami06P.m and ami06N.m model libraries.

Instead of using Spectre State, here will be changing the simluator value to UltraSim. Make sure to use Transient Analysis. UltraSim can only be processed using Transient Analysis.

We will simulate for capacitor values of: 100fF, 1pF, 10pF, 100pF

C=100fF

12u/6u

48u/24u

C=1pF

12u/6u


48u/24u


C=10pF
12u/6u

48u/24u

C=100pF

12u/6u

48u/24u

With these simulations, we can say that as we increase the value of the capacitor, the fall time for the 12u/6u Inverter increases in comparison to the 48u/24u Inverter. We can also say that as we continue to increace the capacitance, the output will straighten out, getting closer to becoming a constant.

Now we have complete Lab #5. Don't forget to compress and back up your lab files.

lab5.zip

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