Project - EE 421L 

Authored by Brian Kieatiwong

kieatiwo@unlv.nevada.edu

11/23/15

  

This lab consists of the creation of the schematic, symbol, and simulation of the class project.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/1.JPG

The image above shows the schematic of a resistor.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/2.JPG

The image above shows the symbol.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/3.JPG

The image above shows the schematic of a voltage divider.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/5.JPG

The image above shows the simulation schematic.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/6.JPG

The image above shows the simulation results.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/7.JPG

The image above shows the schematic of a PMOS.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/8.JPG

The image above shows the simulation schematic.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/9.JPG

The image above shows the simulation results.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/10.JPG

The image above shows the schematic of an NMOS.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/11.JPG

The image above shows the simulation schematic.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/12.JPG

The image above shows the simulation results.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/13.JPG

The image above shows the schematic of an inverter.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/14.JPG

The image above shows the simulation schematic.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/15.JPG

The image above shows the simulation results.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/16.JPG

The image above shows the schematic of a NAND gate.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/17.JPG
The image above shows the simulation schematic.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/18.JPG

The image above shows the simulation results.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/19.JPG

The image above shows the schematic of a NOR gate.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/20.JPG

The image above shows the simulation schematic.
 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/21.JPG

The image above shows the simulation results.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/22.JPG

The image above shows the schematic of a ring oscillator.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/23.JPG

The image above shows the simulation schematic.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/24.JPG

The image above shows the simulation results.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/25.JPG
The image above shows the schematic of a multiplexer.
 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/26.JPG

The image above shows the simulation schematic.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/27.JPG

The image above shows the simulation results.
 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/28.JPG

The image above  shows the schematic of a D flip-flop.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/29.JPG

The image above shows the simulation schematic.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/30.JPG

The image above shows the simulation results.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/31.JPG

The image above shows the schematic of a counter.

 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/32.JPGhttp://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/33.JPG
 http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/34.JPGhttp://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/35.JPG
The image above shows the simulation schematic.
 

http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/36.JPG

The image above shows the simulation results.

 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/37.JPG

The image above shows the schematic of a resistor.

 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/38.JPG
The image above shows the layout.
 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/39.JPG

The image above shows the successful DRC.

 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/40.JPG
The image above shows the extracted layout.
 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/41.JPG

The image above shows the successful LVS.

 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/42.JPG
The image above shows the schematic of a voltage divider.
 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/43.JPG

The image above shows the layout.

 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/44.JPG
The image above shows the successful DRC.
 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/45.JPG

The image above shows the extracted layout.

 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/46.JPG
The image above shows the successful LVS.
 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/47.JPG

The image above shows the schematic of an inverter.

 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/48.JPG
The image above shows the layout.
 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/49.JPG

The image above shows the successful DRC.

 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/50.JPG
The image above shows the extracted layout.
 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/51.JPG

The image above shows the successful LVS.

 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/52.JPG
The image above shows the schematic of a NAND gate.
 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/53.JPG

The image above shows the layout.

 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/54.JPG
The image above shows the successful DRC.
 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/55.JPG

The image above shows the extracted layout.

 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/56.JPG
The image above shows the successful LVS.
 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/57.JPG

The image above shows the schematic of a NOR gate.

 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/58.JPG
The image above shows the layout.
 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/59.JPG

The image above shows the successful DRC.

 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/60.JPG
The image above shows the extracted layout.
 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/61.JPG

The image above shows the successful LVS.

 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/62.JPG
The image above shows the schematic of a ring oscillator.
 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/63.JPG

The image above shows the layout.

 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/64.JPG
The image above shows the successful DRC.
 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/65.JPG

The image above shows the extracted layout.

 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/66.JPG
The image above shows the successful LVS.
 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/67.JPG

The image above shows the schematic of a counter.

 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/68.JPG
The image above shows the layout.
 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/69.JPG

The image above shows the enlarged layout.

 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/70.JPG
The image above shows the successful DRC.
 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/71.JPG

The image above shows the extracted layout.

 
http://cmosedu.com/jbaker/courses/ee421L/f15/students/kieatiwo/Proj/72.JPG
The image above shows the successful LVS.

  

To download the designs from this lab, click here

 

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