Lab 3 - ECE 421L 

Authored by Jesse Horsman,

9/21/2015

 horsman@unlv.nevada.edu

Lab description:

Create a Layout of the DAC that was designed last lab, then run simulations to verify operation.

N-well Layout of 10K resistor:


Now since the minimum width of a n-well is 12 lambda (with lambda being equil to 300nm) or 3.6 microns, I have used a width of 4.5 microns.  Now that I've determined the width, and I know the ohms per square, lenth was easy to find.  
R = rsq*length/width
10k/800*4.5um = 56um.


N-well Layout of DAC:
1 Bit of the DAC:


The Full 10 bit DAC:


Now to double check the measurements, using the ruler fucntion (press k) we can literally measure the n-well to make sure it was all according to plan.


And the pins are of metal1:


Plot of my New Simulation:



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