Lab 1 - EE 421L: Digital Integrated Circuit Design Laboratory


Octavio L. Gonzalez

gonzao1@unlv.nevada.edu

29AUG2015  


Lab description:

Laboratory introduction, generating/posting html lab reports, installing and using Cadence


Pre-Lab Scope

Lab Work

Post-Lab Scope


Pre-Lab:

Below are the pre-lab deliverables.

     Requesting a CMOSedu account. 

        An email was sent to Dr. Baker at rjacobbaker@gmail.com requesting a CMOSedu account.


Request%20Account.png

 

Reviewing material for editing webpages.

The material for editing web pages was reviewed and used to construct this html page.

Refer to image links and formatting for demonstion.


Reviewing%20Material.png 

Below is the snip from "Editing Web Pages at CMOSedu.com" .

snip1.jpg         

Post-Lab:

Below are the post-lab deliverables.


Tutorial Narrative


P1: The ON's C5 Process and fabrication through MOSIS was already set up prior to this Post-Lab,
thus let us begin by creating a Library called Tutorial_1.


Setting%20Up%20Library.png


P2: The tutorial calls for a simple series DC circuit ,

to which the menues and bindkeys were used to construct the following schematic.


 Cadding%20Schematic.png


P3: With the schematic complete, the simulation settings were configured to transient analysis.

Furthermore, the waveforms to be plotted were selected as the "in" and "out" nodes.


Settings.png


P4: Finally , after the simulation settings were defined, the waveform was able to be plotted as shown below.

Note: Tutorial-1 continues on.


Simulation.png


Back-Up Discussion


Back-Ups will be performed regularly as suggested while working on the future labs.

The method of choice will be .zipping the file and emailing to gonzao@unlv.nevada.edu.

File name will be of the form: EE421L_Lab_N_BU NNXXXNNN. e.g. "EE421L Lab 1 BU 29AUG2015"


Back%20Up.png


Conclusion:

Lab 1 served an introduction to generating and posting html lab reports, as well as provided hand on training with installing and using the Cadence C5 Process.



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