Lab 1 - ECE 421L 

Prepared by:

Jason Sikorski

sikorsk4@unlv.nevada.edu

Sept 8, 2014

  

Lab description:

The first part of the Lab went through editing webpages using KompoZer and adding screenshots seen below:

http://cmosedu.com/jbaker/courses/ee421L/f14/students/sikorsk4/Lab1/Snip_1.jpg

The second part of the Lab was to go through the procedure for backing up your work. This was done by zipping the folder I was working in and mailing it to myself, as seen below:

http://cmosedu.com/jbaker/courses/ee421L/f14/students/sikorsk4/Lab1/Snip_2.jpg 

The third part of the Lab was to go over the first Tutorial in Cadence and create a resistive voltage divider.

This was done using an Xterm from my Mac

http://cmosedu.com/jbaker/courses/ee421L/f14/students/sikorsk4/Lab1/Snip_3.png

A new library was created, with a new Cell and Schematic.

http://cmosedu.com/jbaker/courses/ee421L/f14/students/sikorsk4/Lab1/Snip_4.png

The schematic of a 1/2 voltage divder was created using 10k resistors.

http://cmosedu.com/jbaker/courses/ee421L/f14/students/sikorsk4/Lab1/Snip_5.png

The schematic was simulated showing Vout = 1/2 Vin.

http://cmosedu.com/jbaker/courses/ee421L/f14/students/sikorsk4/Lab1/Snip_6.png

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