Lab 7   EE 421L

Taylor Rasmussen
rasmus20@unlv.nevada.edu
10.27.2014



 In this lab we are going to become familiar with the rest of the parts that we will need to make up the ALU for the final project. The first thing we are going to do is figure out how to instantiate multiple parts without needing to have all of them in the schematic. Similar to the tutorial, we are going to make an inverter with 4 instances.
 

 
After we save we can create a symbol for the new 4x inverter.
 

 
And now we can take that symbol and put it in a simulation circuit to ake sure it operates correctly. We connect each of the outputs to a different load to see how it will change. The higher the capacitance of the load, the more rounded off the transitions will be and the rise and fall times will be longer.
 

 
Here is the plot for the inverter. You can see the difference in the output from the different loads.
 
 
Next we are going to create schematics, symbols, and simulations for the other 8-bit gates we are going to need. These gates are AND, NAND, OR, NOR, and inverter.

First is the 8-bit inverter.


And here is the plot. It does exactly what was expected.


 
Next is the 8-bit AND

And here is the plot. Once again, exactly as expected.

 
Next is the 8-bit NAND

And here is the plot. Once again, exactly as expected. It is the opposite of the AND.


 
Next is the 8-bit OR

And here is the plot. Once again, exactly as expected.

 
Finally is the 8-bit NOR.

And here is the plot. Once again, exactly as expected. It is the opposite of the OR just like we wanted.

 
The next part we are going to look at is the MUX/DEMUX. First we need to make a 1-bit verson and test its capabilities in both directions. First it will act as a MUX and will allow us to select which inout will go to the output Z with the signal S.
 Here is the plot for the MUX. When S is high, the output is 5V and when it is low the output is 2V.

 
Now we will reverse it and use it ias a DEMUX.

And here is the plot for the DEMUX. When S is high, B is active and when S is low A is active.

 
Now that we know it works, we can make an 8-bit version and test it. Here is the schematic for the 8-bit MUX.
 

 
And here is the symbol for it.
 

 
Now we can simulate it to make sure it works properly.
 

 
And here is the output. When S is high, the output is 2V and when it is low the output is 5V.

 
Finally we need to make a high speed 8-bit adder similar to the one in figure 12.20.

Here is the schematic for the full adder.
 

 
And here is the smybol created for it.
 

 
Next is the layout for the full adder.
 
 
After that we can extract, DRC and LVS.
 

 
Now that we know that one adder works correctly, we can cascade them to make an 8-bit adder. here is the schematic for the 8-bit adder.
 

 
Here is the symbol.
 

 
The layout is rather large so i will put it up in pieces to show how it all connects together. Notice how the Cout of one adder connects to the Cin of the next.
 



 
Now we need to extract, DRC and LVS.\
 

 
We now have a functioning 8-bit adder and the only thing left is to test it. here is the test schematic. To change the bits all that will be done is changing the voltages of the individual sources to 0V or 5V.
 

 And here is a plot to show that it works. it shows that the outputs are oscillating but it is actually very small if you look at the scale to the right.
 


 
This concludes Lab 7. As always, I zip up my lab directory and webpage files then backup my files on Google Drive.
 
Here is a copy of the directory I used in this lab.
 


 




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