Lab 8 - ECE 421L 

Authored by Hongzhong Li, Koby Sugihara, Brian Smith

Name: Hongzhong Li

Email: lih12@unlv.nevada.edu    

Today's date:12/1/2014 

Lab description

In this lab we constructed a test chip to be fabricated through MOSIS. We added multiple test structures to a bonding bad layout and prepared the chip for fabrication. I was part of group 3 consisting of:

    Hongzhong Li

    Koby Sugihara

    Brian Smith

Our chip is shown below。

The pinout for this chip is as follows.

The different parts are labeled in the following:

1) Begin by connecting pin 20 to ground (building ground). This pin functions as a common ground to all test structures.

2) Begin by simulating the functionality of the bangap. Connect 5V to pin 11 to power the bandgap. Measure the voltage at pin 10 to confirm that it is a reference voltage of 1.25V. Steadily decrease VDD until the bandgap no longer provides a voltage of 1.25V +- 25mV. Determine this bandgap maintain the 1.25 V at a VDD of 4V.

3) Next lets test the oscillator. Connect 5V to pin 21. Connect pin 22 to an oscilloscope and observe the output. Determine the frequency of oscillation. 

4) Next we test the inverter. Connect 5V to pin 8 to power the inverter. next connect a function generator (square wave) to pin 10 to function as the input of the inverter. Connect an oscilloscope probe to pin 8 to observe the output of the inverter. Determine the delay (be sure to consider the capacitance of the oscilloscope probe) and the switching point voltage of this inverter.

5) Next check the resistors (pplus-1k, nplus-1k, nwell-20k, hi-res-20k) with their theoretical values. Check the pinout diagram and check the actual resistance values with theoretical values.

6) Lastly test the MOSFETS. The pinout for the MOSFETS is found on the pinout diagram above. The functionality of the NMOS and PMOS could be tested in different ways. The recommended method is to set the oscilloscope to x-y mode, set the gate voltage to a constant (exceeding threshold voltage), setting the source to ground (nmos) and vdd (pmos), putting the transistor in series with a small resistor to measure current, and then obtaining the Vds vs Id characteristics of the MOSFET. Note that we would like a small enough resistor not to significantly affect the operation of the MOSFET (a large resistor exhibits a large voltage drop affecting MOSFET operation) and large enough to restrict the current as not remove the magic smoke that makes the resistor function.

The complete file can be downloaded from here

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