Lab X - ECE 421L
In this lab we'll be learning how to publish our web page to the cmosedu website. Also we'll go through the first 25 images of tutorial 1.
This
tutorial will introduce us to Cadence 6.1 for chip design, layout, and
simulation. To demonstrate the operation of Cadence we’ll set it up for
In your home directory open the .bashrc file (ensure that you can view hidden files and assuming that you are using the Bash shell) and add the following lines
export SPECTRE_DEFAULTS=-E
export CDS_Netlisting_Mode=Analog
export CDS_LOAD_ENV=CWDElseHome
export CDK_DIR=$HOME/ncsu-cdk-1.6.0.beta
When finished, in a terminal window in your home directory, type the command “. .bashrc” (period, space, period bashrc) to re-source the .bashrc file.
Make a working directory in the home account by typing mkdir CMOSedu
Copy everything in the directory $HOME/ncsu-cdk-1.6.0.beta/cdssetup into $HOME/CMOSedu
In the working directory CMOSedu, rename cdsinit, simrc, and cdsenv to .cdsinit, .simrc, and .cdsenv (add a period)
In CMOSedu open the file cds.lib and add the following lines to point to the built-in Cadence libraries. Note that the path seen below may be different for
DEFINE analogLib /usr/cadence/IC615/tools.lnx86/dfII/etc/cdslib/artist/analogLib
DEFINE functional /usr/cadence/IC615/tools.lnx86/dfII/etc/cdslib/artist/functional
DEFINE sbaLib /usr/cadence/IC615/tools.lnx86/dfII/etc/cdslib/artist/sbaLib
We will use Spectre (Cadence’s spice) for the simulations in these tutorials so add
envSetVal("asimenv.startup" "simulator" 'string "spectre") to the bottom of your .cdsinit file in your home directory
This makes Spectre the default simulator.
Now we can begin to run cadence by typing virtuoso & in your CMOSedu directory.
The following two windows should appear.
Go to File ->New->Library. I followed the tutorial and used "Tutorial_1" for the name of the library. Select AMI 0.60u C5N from the dropdown list then click ok to create a library.
Then go to File -> New -> Cellview to create a schematic.
Once you are in the schematic window, press i (add instance) and select NCSU_Analog_Parts from the component browser
Then select R_L_C -> res for resistors. Change the value of the resistor to 10K. Now you can add resistors to your schematic by lefting clicking on the schematic window.
Thens elect Voltage_Sources and vdc for a voltage source. Set the dc value to 1 volt. Select Supply_Nets and gnd for a ground.
Type w to bring up the wires. Use the wires to connect the circuit. Type l(lower case L) to label Vin and Vout and below is the 2 to 1 divider.
click check and save then go to Launch -> ADE L.
Select analysis -> choose. Set to transient and stop time = 1s.
Select Output -> To Be Plotted -> Select On Schematic. Next, click on Vin and Vout on the schematic.
Go to Session -> Save State, select cell view and click ok. Then run the simulation and the output of the divider should be the following.
Back Up
I edit my htm file on my desktop before uploading to the CMOSedu folder. So I will save all my work on my desktop in a separate folder and then upload a copy upon completion. The separate folder stored on my desktop will serve as my backup
Make your folder into a zip file by -> Add to archive.
One can also choose to upload the zip file to google drive, or just email it to themselves.
Return to my EE 421L listing of Labs