Lab 2 - EE 421L
Authored by Brian Kieatiwong
kieatiwo@unlv.nevada.edu
09/15/14
To begin, the file lab2.zip was downloaded and unzipped on the server running Cadence.
![file:///C:/Users/Brian/AppData/Local/Microsoft/Windows/Temporary%20Internet%20Files/Content.IE5/7PWBIA4M/Lab_2_A[1].JPG](Lab_2_A%5B1%5D.JPG)
The following statement in line 65 was added to the cds.lib in the design directory.
![file:///C:/Users/Brian/AppData/Local/Microsoft/Windows/Temporary%20Internet%20Files/Content.IE5/1F83J6P0/Lab_2_B[2].JPG](Lab_2_B%5B2%5D.JPG)
Here, it can be seen that this library has been successfully added.
![file:///C:/Users/Brian/AppData/Local/Microsoft/Windows/Temporary%20Internet%20Files/Content.IE5/MCQYL6NW/Lab_2_C[1].JPG](Lab_2_C%5B1%5D.JPG)
The following shows the schematic view of the cell sim_Ideal_ADC_DAC.
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The
following shows the simulation of the cell sim_Ideal_ADC_DAC. The
background color, line thickness, and line type were manipulated to
offer better visuals.
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The following topology will be used for the remainder of Lab 2.
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Be sure to copy all associated Lab 2 files into a backup folder of an external hard drive.
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