Lab 7 - ECE 421L
Authored
by Leanna Guevara, guevaral@unlv.nevada.edu
October 27, 2014
Using buses and arrays in the design of word inverters, muxes, and high-speed adders
8-Bit Inverter
Schematic
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Inv8.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Inv8.JPG)
- Input <7:0> to signify 8-bits
- Use shift+w for a thick wire
- Check and save before creating a new symbol
Symbol![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Inv8.2.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Inv8.2.JPG)
Simulations
The simulation will not work if the inverter is not connected to 8 outputs with a thick wire.
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Inv8.3.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Inv8.3.JPG)
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Inv8.4.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Inv8.4.JPG)
8-bit AND
Schematic
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/And8.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/And8.JPG)
Symbol
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/And8.2.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/And8.2.JPG)
8-bit NAND
Schematic
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Nand8.1.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Nand8.1.JPG)
Symbol
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Nand8.2.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Nand8.2.JPG)
8-bit Or
Schematic![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/or8.1.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/or8.1.JPG)
Symbol
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/or8.2.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/or8.2.JPG)
8-bit Nor
Schematic
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Nor8.1.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Nor8.1.JPG)
Symbol
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Nor8.2.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Nor8.2.JPG)
Gate Simulation
To trouble shoot simulation errors its best to simulate the gates individually.
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/gates.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/gates.JPG)
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/gates2.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/gates2.JPG)
1-Bit Mux
Schematic
The
lab instructions state to remove the Si input pin from the Mux symbol.
To do that we inverted the S pin to get Si. (Note: the schematic will
not work if the inverter pins are other values besides S and Si)
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/MUX1.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/MUX1.JPG)
Symbol
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/MUX2.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/MUX2.JPG)
Simulation
Let's ensure that the symbol works properly before creating an 8-bit Mux
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/MUX3.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/MUX3.JPG)
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/MUX4.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/MUX4.JPG)
8-bit Mux
Schematic
Use the same techniques from earlier
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/MUX5.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/MUX5.JPG)
Symbol
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/MUX6.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/MUX6.JPG)
Simulation
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/MUX7.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/MUX7.JPG)
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/MUX8.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/MUX8.JPG)
8-bit Demux
To create a Demux from Mux just change the pins A and B to an Output and Z into an Input
Schematic![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Demux1.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Demux1.JPG)
Symbol
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Demux2.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Demux2.JPG)
Simulation
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Demux3.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Demux3.JPG)
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Demux4.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/Demux4.JPG)
8-bit Full Adder
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/FA6.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/FA6.JPG)
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/FA7.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/FA7.JPG)
![http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/FA8.JPG](http://cmosedu.com/jbaker/courses/ee421L/f14/students/guevaral/Lab%207/FA8.JPG)
This concludes Lab 7.
Download and email the lab file for safe keeping
lab directory
Return to EE 421L