EE 421L Digital Integrated Circuit Design

Lab 2

Design of a 10-bit digital-to-analog converter (DAC) 

Abel De La Torre

September 22th

Lab #2 


First thing to do is download the lab2.zip file to the Desktop and then extract it by uploading it to the CMOSedu folder.  Then it must be defined in the MobaTextEditor as shown in the following 

Start running Virtuoso and find the lab2 in  library manager tosim_ideal_ADC_DAC in the cell window and then open the schematic.

The following display the schematic of our project

Now we can  run the simulation by launching the ADE                                                        



Then from the session tab select load/state

In this next window select CellView and press ok

Now we can press the green play button on the right

After pressing PLAY to run the simulation, the following graph will be displayed.

In this lab we'll use n-well resistors to implement a 10-bit DAC.
Our design is based on the following Figure. The controlling input bits seen below come from the ADC, in other words the inputs to the DAC are the left side of the 2R resistors.

The following is the design of the resistor ADC unit. The in pin takes in voltage of the digital binary signals. The top

of the unit of the most significant bit will be the quantized analog curve.  The bottom unit is connected to 

ground and  a 20k resistor,. And the top  units are connect to the  bottom of the other units.





To creat a simbol for this lab select  create -> cell view -> from cell view, and then create a symbol for this schematic.



The following displays the schematic of the created for the simbol and will be set in series of 10 2R and R

Now we test the design given in this lab which is displayed in the following schematic using the resistors DAC

The following is the output ofthe circuit.  Its waveform output is almost identical to the original circuit shown at the top of this lab. 

The differences between the two outputs is marked by a blue circle in th eschematic below. Which is different only at the beggining of the waveform. 



The following isthe display of  the waveform of the schematic.



Next is the schematic with the 10K resistor at the output



The output of the DAC 10K resistor is close to 2.5V. It displays the following because the 10K resistor  load is in series with the DAC circuit.  The following is the waveform of the voltage divider.



The following is the same schematic but its now displaying a  10pF capacitor instead of a 10K resistor



Because of the capacitor, it has made the waveform  much smoother, this is due to the impedence of the capacitor.

The voltagerises in the capacitor giving a much cleaner waveformthan the resistor





Now, the schematic displays  both the 10K reistor and the 10pF capacitor in parallel



The following is a combination of the previews 2 schematics, giving a clean wavefor

 

Now, We must back up the lab by compressing it  and e-mailing it to yourself to make sure you dont lose any work