Lab 7 - EE 421L 

Koby sugihara,

carpiosu@unlv.nevada.edu

10/26/14

First dont forge to take a looka the the tutorial:

Then dont forget to back up your cmosedu folder: i save mine ot a hard drive and my desktop.

This is my 4bit Inverter and symbol: dont forget to use busses and to turn on the value for I0 so that it shows up like below or it will DRC and you will get an error. Also make sure you use input and output pin for the inverter to correctly label it when you create a symbol from it.

This is my simulation of the bit inverter to test if it was correct. I used loads 100f,500f, and 1p and a pulse from 0-5 volts. 

This was my grpah i got from the simulation: Just for future refeerence i will have my loads with capacitors and ill have one wiht a noconnect to see if they gate is funcctioning correctly:

This is my shcematic for the 8bit inverter and the symbol for it:

As above i simulated the inverter but with 8 bits this time:

out<0> was my noconnnec load so that i could see if the inverter was functioning correctly:

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Next we moved on to the nand. This was similair to above. First we had to create a schematic for the nand and the symbol. Then we have to create an 8bit nand using the symbol from the original nand and drawing the 8 bit schematic.Lastly we then have to simulate the 8 bit so that we know it is working properly.

So first this is my nand schematic and symbol: We already created a nand schematic in the previous lab if you would like to look up where i got the symbol from. But this is the 8bit nand schematic.

This is my 8bit nand symbol:

Then we had to simulate the 8bit nand symbol to make sure we configured it and drew the schematic properly.

Again out<0> was to make sure the gate was functioning properly:

Next we had to make and 8bit and gate. But first we have to change the schematic from nand to and. This is really easy because you take the nand schematic and put an inverter at the output to create an and schematic like below:

Next we have to make and and symbol to use in the 8bit and schematic: Try to make your symbols look as close to what the gate actually looks like becuase you will be using it in future and it will be easier to look at schematics.

This is my 8bit and schematic: remeber to use busses and the correct input and output pins.

Next you have to create the symbol:

Now we have to simulate the 8 bit and gate: this is my schematic i drew to test it.

Again remeber out<0> is to test the gate and then i also tested the gate with different loads.

 Next we will create an nor and an 8bit nor. This is very similar procedure as the nand gate but we need to do it for nor.

So first we drew the schematic of an nor gate:

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Then we have to create a regular nor symbol so we can use it in the 8bit schematic. So i already created the symbol and put it in the schematic below.

Next we have to create the 8bit nor symbol and it should look similar to below.

Then we have to simulate the nor gate with loads and with bits:

This is my output graph:

Next just like the nand and and gate now we have to make the or from the nor gate. This is similar to the nand-and because you just need to put  an inverter at the output of the nor gate to create a nor schematic like below:

Next we have to create the or symbol from the schematic:

Next we have to do the same procedures as above and create the 8bit or schematic using busses and pins:

Then we had to create the or symbol form the 8bit shcematic to use in our simulation:

This is my simulation schematic:

This is my graph from the schematic above to test the gate:

next we need to create the same procedure as above but for a mux.  First we had to create an 8 bit mux inculding the si feature and then an 8bit mux without the si pin and using the inverter int he schematic.

First we will do the regular mux schematic: 

Then we need to create the symbol for mux:

As you can see above it has SI in it and we want to create one without SI also:

So i did this: I put the inverter from s to si instead of having it as a sepearte pin in the schematic.

Then i created this symbol fromt he above schematic:

Next we have to create and 8bit mux so this is my 8bit MUX schematic below:

This is my 8bit mux symbol that I will use in the simulation to test if my mux is working correctly:

This is my shcematic to test the MUX:

I only did this schematic to test if the gate worked and this was my result:

Now we move on the the last part of the lab 7 the FA. This full adder is different from the one in the last lab so make sure you dont just copy the layout and schematic. This is from Prof. Bakers book fig.12.20.

First we had the copy the schematic into cadence. I used inverters at the outputs but if you wanted you could have used the schematic view of the inveter instead of the symbol. Which ever one is easier for you to look at when comparing the layout. As seen below this is only for the schematic of a 1bit FA. We need to make 8bits so from this you have to make a symbol then proceed to make the 8bit schematic then LVS that layout and drc that layout. But first it would be easier if you also drew the layout for the 1 bit and instantiated it  8 times intot he 8 bit then connected them with the different pins.

This is my FA symbol and FA 8but schemtic: make sure you label your wires and busses correctly alsot he pins. I found that without labeling it correctly i ran into many problems when doing my 8but layout LVS.

Then we created an 8bit symbol from the schematic:

This is my 8 bit Full Adder layout: in full view.

This is the full adder layout zoomed in: Remember to label each and and b pin as input from <0>-<7>. This is the same for the s pins but as output pins. Also remeber to create 1 cin pin in the begining and 1 cout pin at the end to match your schematic. Lastly create  a pin of vdd! and ground over all 8 parts of the FA.

This is my LVS and DRC:

Lastly we need to do the same as the other gates and test our new 8bit FA using the symbol we created.

This is my output graph:

Then we have finished lab 7. These are my files:

And dont forget to back up your lab 7.

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