Lab 3 - EE 421L 

Koby sugihara,

9/28/14 


Lab objective: The purpose of this lab is to use the layour of the 10-bit DAC created in lab2 to make a 10k resistor

pre lab: first I backed up my files on cadence using tar -cvf backupdate.tar cmosedu/

Next we had to finish tutorial 1 so i made a 10k nwell resistor. First I uploaded tutorial 6 to the library and don't forget to define the tutorial_6 file in the cds.lib file. Next I created a new cell in the tutorial 6 folder and created it as a layout type to draw the nwell resistor.


Next i drew a rectangle using the nwell draw. I had to calculate the length and width of the resistor by using the equation: R-sheet resistance*(L/W)=total-Resistance.

Remember in the c5 process it is automatically set to 800 ohms sheet resistance.  To get 10k resistor i got 10k/800=(L/W). Thus i got 25/2. But you have to remember the width of the resistor has to be a minimum of 3.6 so you have to multiply the top and bottom by (3.6/2). Thus i got L=45 and W=3.6. edit the rectangle you drew ( Q) and put in the dimensions like shown. Then DRC it to make sure everything checks out ok.


Next get your NTAP's instance and put them flush to the end of the ends of the rectangle. Make sure to make the contacts to 2 to look like below.

Next create pins and label the left side "L" ands right side "R".  Dont forget to tick the option to show pin names when making pins.


Next go to "res_id" make sure it is in the drw purpose. Then create a rectangle over the rectangle you drew in the first place as your resistor.Then DRC to check your layout to make sure you drew everything correctly with no errors. It should look like something similar to below.

Next in the layout window go to verify and press extract. Go to your extract file and see what resistance your resistor you made comes out to 10k. My resistor came out to 10.24k which was very close to 10k.

Next Create a layout and instance in 3 of the 10k resistors you made.  Then connec two of the resistors in parallel then series with 1 of the resistors. Make sure the X coordinate is the same and they are placed apart. Make sure you DRC the layout to make sure the resistor meet the requirewments of spacing and you have no errors.

 


So i created two of the 2R-R resistors together then copied them to make 10 bundles of them. You want ten in parallel so that you can have a 10k resistor out of 10 10k's. But remember that the last bundle of 2R-R resistors that a second resistor must be added to make a full 10k resistor. We calculated that last lab. After you are done make sure you label the nodes to the top of the resistor b9-b0 to match your last schematic. Also remember to have one vout going out of your B9 resistor.Then at the verybottom make sure you connect the last pin to ground wiht an "!" mark after it. After you are done DRC it to make sure the spacing is right for all the resistors and that you dont have missing connections.



Your schematic should something like this when you zoom in.

Lastly make sure when you are done settiing up your resistors to make the 10 k resistor to LVS the extracted layout and to check and save. Then you go to verify-LVS. Then you schoose the schematic we made in lab 2 and compare it to the extracted layout you made with all the resistors. You should get no errors and it should say that the schematics match


I backed up my files and emailed it to myself in the end.

Here are my zip files of tutorial 6 containing my layout:files

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