Lab Project - ECE 421L
I designed the DEMUX, AND and OR gates in lab 7. So I used the icons for the ALU design.
AND gate array:
OR gate array:
DEMUX:
I also utilized the ALU I created in lab 7.
The next step was to put the ALU together in a schematic:
I needed control inputs to select the different functions of the ALU. Below is a table woth the control bits:
OPERATION | F1 | F0 |
ADD | 0 | 0 |
SUBTRACT | 0 | 1 |
OR | 1 | 0 |
AND | 1 | 1 |
The ALU schematic with icon view: The 8-bit inputs for A and B. The 2-bit control F. The 8-bit output Z.
I needed to create a new icon. The clip below shows the correct inputs and outputs. A (8-bits), B (8-bits), F (2 bits) and the output Z (8-bits).
Now for the simulations:
To test the add function, I used binary A=11111110 (0xFE in hex) added to B=00011111 (0x1F in hex).
The result shows the correct answer: A+B=00011101 (0x1D in hex). The control F=0x00.Now lets simulate the subtraction function of the ALU:
Here I will use A=01011110 (5E hex), B=00110101 (35 hex), F=0x01. The result shows 00101001 (29 hex)
Now for the OR function:
A=11110000 (F0 hex), B=01011010 (5A hex). The control iput for OR is 0x10. The result of A OR B=11111010 (0xFA hex)
The AND function:
A=11110101 (hex F5), B=01010110 (56 hex). The control for AND is 11. The result: A AND B= 01010100 (54 hex)