EE 420L – Engineering Electronics II Lab – Lab 6
Due: March 27,
2019
·
Experimentally finding gain, input resistance, and output
resistance of single-stage MOSFET amplifiers.
·
Watch the single_stage_amps discussion
video.
·
Review datasheets for MOSFETs used in this lab.
o
·
Verify operation of the simulations in the lab6_sims zip folder.
·
Read the lab write-up before coming to lab.
Lab Tasks
·
For
common-drain, common-source, and common-gate amplifier topologies:
o Hand calculate
gain, input resistance, output resistance.
§ Input
Resistance:
·
Add a resistor equal to the hand calculated value between the
input voltage source and the amp.
·
Measure the peak AC current through the resistor.
·
Measure the peak AC voltage on the input of the amplifier.
·
Divide the peak AC voltage by the peak AC current to yield the
experimental input resistance.
§ Output
Resistance (for common-drain amplifier):
·
Add a resistor equal to the hand calculated value in series with a
big capacitor from the output to ground.
·
Measure the peak AC current through the resistor.
·
Measure the peak AC voltage on the gate of the MOSFET and the
source of the MOSFET to yield peak Vgs.
·
Divide the peak AC Vgs by the peak AC
current to yield the experimental output resistance.
o Verify hand
calculations with simulations and experimentation.
o Discuss both
DC and AC operation of the amplifiers.
o Only for
common-source and common-gate:
§ Discuss how
the source resistance influences the gain.
·
For push-pull
amplifier topology:
o Hand calculate
the gain.
o Verify hand
calculations with simulations and experimentation.
o Discuss both
DC and AC operation of the amplifier.
o Discuss what
happens to the gain if the 100k resistor is replaced by a 510k resistor and
why.
o State whether or not you think the amplifier would be good at
sourcing/sinking current and explain.
Common-Drain Amplifiers
Common-Source Amplifiers
Common-Gate Amplifiers
Push-Pull Amplifier
---------------------------------------------------------------------------------------
Part 1: Common-Drain (Source-Follower) Amplifiers
NMOS Common-Drain Amplifier
Operation
AC
·
The common-drain
amplifier has an input signal at the gate and an output signal at the source.
·
The input
signal and output signal in this topology are “common” to the drain of the transistor.
·
The AC gain of
this amplifier is always close to 1 (see hand calculations below).
·
The AC output
voltage can be found by multiplying the AC drain current by R2 in the schematic
below.
DC
·
The gate voltage of the device can be found by solving the voltage
divider of the input resistors (R1 and R3) powered by VDD.
·
The DC output voltage can be found by multiplying R2 by the DC drain
current of the transistor.
Breadboard Implementation and
Spice Schematics
Hand Calculations
Experimentation and Simulation
Gain of 0.897 V/V
Output with Added Resistor
Equal to Calculated Rin
Output with Added Resistor
Equal to Calculated Rout
PMOS Common-Drain Amplifier
Operation (very similar to
operation of NMOS Common-Drain Amplifier)
AC
·
The AC gain of
this amplifier is always close to 1 (see hand calculations below).
·
The AC output
voltage can be found by multiplying the AC drain current by R6 in the schematic
below.
DC
·
The gate voltage of the device can be found by solving the voltage
divider of the input resistors (R1 and R3) powered by VDD.
·
The DC output voltage can be found by multiplying R2 by the DC drain
current of the transistor, and subtracting this
voltage from the power supply voltage (VDD).
Breadboard Implementation and
Spice Schematics
Hand Calculations
Experimentation and Simulation
Gain of 0.776 V/V
Output with Added Resistor Equal
to Calculated Rin
Output with Added Resistor
Equal to Calculated Rout
---------------------------------------------------------------------------------------
Part 2: Common-Source Amplifiers
NMOS Common-Source Amplifier
Operation
AC
·
The common-drain
amplifier has an input signal at the gate and an output signal at the drain.
·
The input
signal and output signal in this topology are “common” to the source of the transistor.
·
The AC gain of
this amplifier varies based on the value of Rsn in
the schematic below.
·
Because the parallel
combination of R2 and Rsn is a much smaller resistance
than the value of R2,
the gain of
this topology will always be reasonably larger than one (see hand calculations).
·
The AC output
voltage can be found by multiplying the AC drain current by R8 in the schematic
below.
DC
·
The gate voltage of the device can be found by solving the voltage
divider of the input resistors (R1 and R3) powered by VDD.
·
The DC output voltage can be found by multiplying R8 by the DC drain
current and subtracting this voltage from
the power supply voltage (VDD).
Breadboard Implementation and
Spice Schematics
Hand Calculations
Questions:
1.
How does the source resistance, Rsn,
influence the gain?
o
From the gain equation in the
hand calculations above, since Rss in parallel with Rsn is approximately Rsn,
we can say
that Vout/Vin is inversely proportional to the sum of
(1/gm) and Rsn. This means that as
Rsn increases, gain will decrease,
and as Rsn decreases, gain will increase. We can observe
this in the
simulation
and the experimental results below when Rsn in our breadboard
circuit and our LTspice
schematic
was reduced from 100 to 50 Ohms.
Experimentation and Simulation
Gain of 4.88 V/V (Rsn = 100 Ohms)
Gain of 5.91 V/V (Rsn = 50 Ohms)
Output with Added Resistor
Equal to Calculated Rin
Output with Added Resistor
Equal to Calculated Rout
PMOS Common-Source Amplifier
Operation (very similar to
operation of NMOS Common-Source Amplifier)
AC
·
The AC gain of
this amplifier varies based on the value of Rsp in
the schematic below.
·
Because the parallel
combination of R6 and Rsp is a much smaller resistance
than the value of R6,
the gain of
this topology will always be reasonably larger than one (see hand calculations).
·
The AC output
voltage can be found by multiplying the AC drain current by R8 in the schematic
below.
DC
·
The gate voltage of the device can be found by solving the voltage
divider of the input resistors (R1 and R3) powered by VDD.
·
The DC output voltage can be found by multiplying R7 by the DC drain
current of the transistor.
Breadboard Implementation and
Spice Schematics
Hand Calculations
Note that the 1/gmp used in the hand
calculations above is 208.33 Ohms. In previous calculations,
1/gmp was 208.33 Ohms, taken from the
spice error log. However, my partner and I did not get a
Voltage of ˝ when we connected our calculated input resistance in
series with Vin. Using the value
of voltage that we received, we back solved for the actual gm value
of the transistor we were using.
That value was used in the calculations moving forward.
Questions:
1.
How does the source resistance, Rsp,
influence the gain?
o
From the gain equation in the
hand calculations above, since Rss in parallel with Rsp is approximately Rsp,
we can say
that Vout/Vin is inversely proportional to the sum of
(1/gm) and Rsp. This means that as
Rsp increases, gain will decrease,
and as Rsp decreases, gain will increase.
Experimentation and Simulation
Gain of 2.65 V/V
Output with Added Resistor
Equal to Calculated Rin
Output with Added Resistor
Equal to Calculated Rout
---------------------------------------------------------------------------------------
Part 3: Common-Gate Amplifiers
NMOS Common-Gate Amplifier
Operation
AC
·
The common-gate
amplifier has an input signal at the source and an output signal at the drain.
·
The input
signal and output signal in this topology are “common” to the gate of the transistor.
·
The AC gain of
this amplifier varies based on the value of Rsn in
the schematic below.
·
Because the parallel
combination of R2 and Rsn is a much smaller resistance
than the value of R2,
the gain of
this topology will always be reasonably larger than one (see hand calculations).
·
The AC output
voltage can be found by multiplying the AC drain current by R8 in the schematic
below.
DC
·
The gate voltage of the device can be found by solving the voltage
divider of the input resistors (R1 and R3) powered by VDD.
·
The DC output voltage can be found by multiplying R8 by the DC drain
current and subtracting this voltage from
the power supply voltage (VDD).
Breadboard Implementation and Spice Schematics
Hand Calculations
Note that the 1/gmn used in the hand
calculations above is 118 Ohms. In previous calculations,
1/gmn was 51 Ohms, taken from the spice
error log. However, my partner and I did not get a
Voltage of ˝ when we connected our calculated input resistance in
series with Vin. Using the value
of voltage that we received, we back solved for the actual gm value
of the transistor we were using.
That value was used in the calculations moving forward.
Questions:
1.
How does the source resistance, Rsn,
influence the gain?
o
From the gain equation in the
hand calculations above, since Rss in parallel with Rsn is approximately Rsn,
we can say
that Vout/Vin is inversely proportional to the sum of
(1/gm) and Rsn. This means that as
Rsn increases, gain will decrease,
and as Rsn decreases, gain will increase.
Experimentation and Simulation
Gain of 4.39 V/V
Output with Added Resistor
Equal to Calculated Rin
Output with Added Resistor
Equal to Calculated Rout
PMOS Common-Gate Amplifier
Operation (very similar to
operation of NMOS Common-Gate Amplifier)
AC
·
The AC gain of
this amplifier varies based on the value of Rsp in
the schematic below.
·
Because the parallel
combination of R6 and Rsp is a much smaller resistance
than the value of R6,
the gain of
this topology will always be reasonably larger than one (see hand calculations).
·
The AC output
voltage can be found by multiplying the AC drain current by R7 in the schematic
below.
DC
·
The gate voltage of the device can be found by solving the voltage
divider of the input resistors (R1 and R3) powered by VDD.
·
The DC output voltage can be found by multiplying R7 by the DC drain
current of the transistor.
Breadboard Implementation and Spice Schematics
Hand Calculations
Questions:
1.
How does the source resistance, Rsp,
influence the gain?
o
From the gain equation in the
hand calculations above, since Rss in parallel with Rsp is approximately Rsp,
we can say
that Vout/Vin is inversely proportional to the sum of
(1/gm) and Rsp. This means that as
Rsp increases, gain will decrease,
and as Rsp decreases, gain will increase. We can observe
this in the
simulation
and the experimental results below when Rsp in our breadboard
circuit and our LTspice
schematic
was reduced from 100 to 50 Ohms.
Experimentation and Simulation
Gain of 2.42 V/V (Rsp = 100 Ohms)
Gain of 2.91 V/V (Rsp = 50 Ohms)
Output with Added Resistor
Equal to Calculated Rin
Output with Added Resistor
Equal to Calculated Rout
---------------------------------------------------------------------------------------
Part 4: Push-Pull Amplifier
Operation
AC
·
In the push-pull amplifier, the AC input signal will swing between
a positive and a negative voltage.
·
When a positive current is fed in, the PMOS shuts off, and the
NMOS turns on.
·
When a negative current is fed in, the NMOS shuts off, and the
PMOS turns on.
·
The NMOS and PMOS are pushing and pulling a current to/from the
output.
·
Due to Kirchoff’s Current Law, the sum
of the currents in the MOSFETs is equal to the current through R1.
·
If R1 is increased, the gain will go up (see hand calculations).
DC
·
The only DC component of the circuit is VDD, used to power the
circuit.
·
The gates of the transistors are not DC biased, so the transistors
only turn on and off based on the AC input.
Breadboard Implementation and
Spice Schematic
Hand Calculations
Questions:
1.
Do you expect the amplifier to be good at sourcing/sinking
current? Why or why not?
o
The push-pull amplifier is
structured such that the PMOS device with its source connected to VDD
will source current
while the NMOS device with its source connected to GND will sink current. Since
PMOS devices
are good at passing logic 1s (VDD) and NMOS devices are good at passing logic
0s (GND)
it would
make sense that the amplifier would be good at sourcing and sinking current at
first glance.
However,
there are no DC voltages at the gate of the devices. The transistors are not DC
biased, so
they barely
turn on to source or sink current. I do not expect the amplifier to be good at
sourcing or
sinking
current for this reason.
2.
What happens to the gain if the 100k resistor is replaced with a
510k resistor? Why?
o
From hand calculations,
From the
above equation, we see that for high R values, the gain is near directly
proportional to R.
If the resistor is increased by 100k, the
gain will increase by roughly 5. From hand calculations, we see
that the calculated gain for the 100k
resistor is roughly five times smaller than the calculated gain for the
510k resistor.
Experimentation and Simulation
Gain of 1000 V/V, 2mVpp in,
2Vpp out, No Clipping
10mVpp in, 4Vpp out, Output
Clipping due to Huge Gain
Gain of -1319 V/V, 20mVpp in,
100k Resistor
Gain of -6731 V/V, 20mVpp in,
510k Resistor
