Lab 6 - EE 420L
reedj35@unlv.nevada.edu
There will
be 4 experiments where each focus on a specific topology for both an NMOS and
PMOS. The
specific
MOSFETs we will be experimenting with are ZVN3306A and
ZVP3306A.
Experiment 1: Source
Follower (Common-Drain Amplifier)
Figure
1: Source Follower Schematic
Circuit Operation:
This
circuit is known as either a source follower or common-drain amplifier. The
reason why it’s called a common-drain
amplifier
is because the drain is common to both the input and output of the MOSFET. The
gate of the MOSFET is the
input, and
the source is the output. This leaves the drain common to both. This circuit
will have an approximate gain of
1 due to
its topology. There will be a DC voltage at the gate found by voltage division
due to R1 and R3. This voltage
division is
to ensure that the MOSFETs are in saturation. The capacitor is a coupling
capacitor for AC coupling so that the
biasing is
not affected. This circuit is normally used as a voltage buffer.
ZVN3306A DC
Calculations:
Looking at
the “models_3306.txt” file, 
, 
ZVN3306A AC
Calculations:
, 
ZVP3306A DC
Calculations:
Looking at
the “models_3306.txt” file,
, 
ZVP3306A AC
Calculations:
, 
Using
Electrolytic Capacitors:
For these
circuits, 15µF capacitors (10µF was not readily available) were used. The
reason why the capacitors
must be
connected in a specific way is because these capacitors are polarized. Since Vin
is a small signal that
is
generated by the function generator, that node in the circuit has a DC voltage
of 0. The gate of the MOSFETs
will have a
higher DC voltage at the gate of the MOSFET than at the small signal input
coming from the function
generator.
The capacitors are polarized, meaning that the higher DC potential of the
circuit should be getting
the “+”
terminal of the capacitor and the “-“ terminal should
be attached to a node that is at a lower potential.
This is due
to the material inside of the capacitor that allows the capacitor to charge
when there is an electric
field
present. There is a specific magnitude of electric field that will cause the
material to break down, known as
EBD
when the field applied is in the correct direction. If the field applied is in
the incorrect direction, the material
will break
down differently than designed, and the capacitor could fail to operate
correctly.
Simulations:
|
Figure 2: DC Calculations |
Figure 3: Spice Error Log |
|
Figure 4: Waveforms to determine
gain |
|
Figure 5: Schematic with Input
Resistance |
Figure 6: Input Resistance
simulation at 10kHz |
|
Figure 7: Schematic with Output
Resistance |
Figure 8: Output Resistance
simulation at 10kHz |
Experimental
Measurements:
|
NMOS |
PMOS |
|
Figure 9: ZVN3306A Gain - Input:Yellow, Output:Blue |
Figure 10: ZVP3306A Gain - Input:Yellow, Output:Blue |
|
Figure 11: Voltage drop across Rin
for ZVN3306A |
Figure 12: Voltage drop across Rin
for ZVP3306A |
|
Figure 13: Voltage drop across Rout
for ZVN3306A |
Figure 14: Voltage drop across Rout
for ZVP3306A |
|
Figure 15: Vgs
calculation - Vg:Yellow, Vs:Blue |
Figure 16: Vsg
calculation - Vs:Yellow, Vg:Blue |
To measure
the input resistance, one would just place a resistor equivalent in value to
the
calculated
input resistance into the circuit in between the input signal and capacitor.
Find
the voltage
drop across the resistor and divide by the value of
the resistor to find the current
that flows
through the resistor. You then find the peak voltage at the node between the
resistor
and
capacitor. Divide the peak voltage found by the current that flows through the
resistor
to find the
experimental value of input resistance. For this experiment, the blue waveform
in figures
11 and 12 also show the peak voltage at the node between the resistor and
capacitor.
ZVN3306A
Input Resistance Measurement:
ZVP3306A
Input Resistance Measurement:
To measure
the output resistance, one would use a resistor equivalent in value to the
calculated
output
resistance in series with a large capacitor. These two would be placed in
parallel to the resistor
that shares
a node with the output. Find the current that flows through this resistor, and
measure the
peak
voltage at the gate and source of the MOSFET to find vgs.
Divide vgs by the current that flows
through the
resistor to find the output resistance.
ZVN3306A
Output Resistance Measurement:
ZVP3306A
Output Resistance Measurement:
ZVN3306A:
|
|
Gain
(V/V) |
Rin
(Ω) |
Rout
(Ω) |
|
Hand Calculations |
0.948 |
33.3k |
52 |
|
Simulations |
0.948 |
33.3k |
56 |
|
Experimental |
0.964 |
35.3k |
67 |
ZVP3306A:
|
|
Gain
(V/V) |
Rin
(Ω) |
Rout
(Ω) |
|
Hand Calculations |
0.914 |
33.3k |
86 |
|
Simulations |
0.903 |
33.3k |
86 |
|
Experimental |
0.679 |
44.1k |
63 |
Experiment 2:
Common-Source Amplifier
Figure 17: Common-Source Amplifier
Schematic
Circuit
Operation:
Unlike the
common-drain amplifier, this common-source amplifier has the input at the gate
and the output at the drain.
This means
that the source is common between the input and the output. Just like before,
the voltage divider at the gate
ensures
that the MOSFETs are in saturation, and the capacitor is for AC coupling. The
gain for this device can be increased
or
decreased by changing the value of Rsn and
Rpn. We will see in the hand calculations
and experiment that increasing
the value
of these resistors will decrease the gain of the amplifier.
ZVN3306A DC
Calculations:
Looking at
the “models_3306.txt” file,
, 
ZVN3306A AC
Calculations:
, 
ZVP3306A DC
Calculations:
Looking at
the “models_3306.txt” file,
, 
ZVP3306A AC
Calculations:
,
Simulations:
|
Figure 18: DC Calculations |
Figure 19: Spice Error Log |
|
Figure 20: Waveforms to determine
gain |
|
Figure 21: Schematic with input
resistance |
Figure 22: Input resistance
simulation at 10kHz |
|
Figure 23: Schematic with output
resistance |
Figure 24: Output resistance
simulation at 10kHz |
Experimental
Measurements:
|
NMOS |
PMOS |
|
Figure 25: ZVN3306A Gain - Input:Yellow, Output:Blue |
Figure 26: ZVP3306A Gain - Input:Yellow, Output:Blue |
|
Figure 27: Rsn
increased to 200Ω, gain has decreased |
An increase in Rsp will result in the
same decreased gain as with the NMOS. |
|
Figure 28: Voltage drop across Rin
for ZVN3306A |
Figure 29: Voltage drop across Rin
for ZVP3306A |
|
Figure 30: Voltage drop across Rout
for ZVN3306A |
Figure 31: Voltage drop across Rout for ZVP3306A |
|
Figure 32: Vgs
calculation - Vg:Yellow, Vs:Blue |
Figure 33: Vsg
calculation - Vs:Yellow, Vg:Blue |
ZVN3306A
Input Resistance Measurement:
ZVP3306A
Input Resistance Measurement:
ZVN3306A
Output Resistance Measurement:
ZVP3306A
Output Resistance Measurement:
ZVN3306A:
|
|
Gain
(V/V) |
Rin
(Ω) |
Rout
(Ω) |
|
Hand Calculations |
-6.51 |
33.3k |
1k |
|
Simulations |
-6.82 |
33.3k |
1k |
|
Experimental |
-4.6 |
37.6k |
145 |
ZVP3306A:
|
|
Gain
(V/V) |
Rin
(Ω) |
Rout
(Ω) |
|
Hand Calculations |
-5.17 |
33.3k |
1k |
|
Simulations |
-5.38 |
33.3k |
1k |
|
Experimental |
-1.92 |
37.9k |
560 |
Experiment 3: Common-Gate
Amplifier
Circuit
Operation:
Just like
the two circuits beforehand, this topology also has a node in common with the
input and output.
The node
that is in common with the input and output is the gate; hence why it is called
a common-gate
amplifier.
A small signal is applied at the source of each MOSFET and the output is at the
gate. This circuit
will have a
similar gain as the common-source amplifier, however, the output will not be
inverted. In other
words, the
output will not have a phase shift. We will see this in simulation and in the
experiments; also,
the fact
remains the same with Rsn and Rsp in that when increased, gain decreases.
ZVN3306A DC
Calculations:
Looking at
the “models_3306.txt” file,
,
ZVN3306A AC
Calculations:
,
ZVP3306A DC
Calculations:
Looking at
the “models_3306.txt” file,
,
ZVP3306A AC
Calculations:
,
Simulations:
|
Figure 34: DC Calculations |
Figure 35: Spice Error Log |
|
Figure 36: Waveforms to determine
gain |
|
Figure 37: Schematic for input
resistance |
Figure 38: Input resistance
calculation for ZVN3306A
Figure 39: Input resistance
calculation for ZVP3306A |
|
Figure 40: Schematic for output
resistance |
Figure 41: Output resistance
calculation for both MOSFETs |
Experimental
Measurements:
|
NMOS |
PMOS |
|
Figure 42: ZVN3306A Gain - Input:Yellow, Output:Blue |
Figure 43: ZVP3306A Gain - Input:Yellow, Output:Blue |
|
Figure 44: Rsn
increased to 200Ω, gain has decreased |
An increase in Rsp will result in the
same decreased gain as with the NMOS. |
|
Figure 45: Voltage drop across Rin
for ZVN3306A |
Figure 46: Voltage drop across Rin
for ZVP3306A |
|
Figure 47: Voltage drop across Rout
for ZVN3306A |
Figure 48: Voltage drop across Rout
for ZVP3306A |
|
Figure 49: Output is approx half of the original output |
ZVN3306A
Input Resistance Measurement:
ZVP3306A
Input Resistance Measurement:
ZVN3306A and
ZVP3306A Output Resistance Measurement:
In figure
49, we can see that the output of the MOSFET is half that of the original gain
of the MOSFET.
This shows that the output resistance is indeed, 1kΩ.
ZVN3306A:
|
|
Gain
(V/V) |
Rin
(Ω) |
Rout
(Ω) |
|
Hand Calculations |
5.86 |
162 |
1k |
|
Simulations |
6.10 |
153 |
1k |
|
Experimental |
4.29 |
323 |
1k |
ZVP3306A:
|
|
Gain
(V/V) |
Rin
(Ω) |
Rout
(Ω) |
|
Hand Calculations |
4.66 |
196 |
1k |
|
Simulations |
4.82 |
189 |
1k |
|
Experimental |
1.5 |
466 |
1k |
Experiment 4: Push-Pull
Amplifier
Circuit
Operation:
A push-pull
amplifier is meant to source current to a load and sink current from a load.
The resistor serves to self-bias the circuit
and no DC
current will flow through the MOSFETs. When there is a small signal input, the
positive cycle will turn on M1 and turn
off M2; and
on the negative cycle M1 will be off and M2 will be on. It seems that this
circuit will serve as a sink and source for the
load and
provides large amplification, and as such, large power output.
Circuit Calculations:
Do you expect this amplifier to be good at sourcing/sinking
current? Why or why not?
I expect this amplifier to be good at both sourcing and sinking
current. When one of the MOSFETs is turned
on, the other one is off. An NMOS is good at sinking current and a
PMOS is good at sourcing current.
Since this is the case, the NMOS will be on and good at sinking
current while the PMOS is off and vice versa.
What happens to the gain if the 100k resistor is replaced with a
510k resistor? Why?
According
to my hand calculations, the gain will increase when the 100k resistor is
increased to a larger value.
An increase in value of the resistor will force the gain to also linearly
increase.
Simulations:
|
|
|
|
|
|
|
Figure 50: Gain with input of 0.5mV
(due to voltage division) for 100k resistor |
Figure 51: Gain with input of 0.1mV
(due to voltage division) for 510k resistor |
|
|
Gain
(V/V) of 100k |
Gain
(V/V) of 510k |
|
Hand Calculations |
2.9k |
14.6k |
|
Simulations |
1.99k |
3.46k |
|
Experimental |
1.28k |
11.2k |
For the simulation
of the gain with a resistance of 510k, the simulation looks like it is saturated
at the peak
and so the simulation could not correctly display what the actual gain is.