Lab 3 - EE 420L 

Authored by Jacob Reed

reedj35@unlv.nevada.edu

Due Date: February 20, 2019

Prelab Work

• Watch the video op_amps_I, review op_amps_I.pdf (associated notes), and simulate the circuits in op_amps_I.zip.
• Read the write-up seen below before coming to lab.

Lab Description

For this lab, we are utilizing the LM324 op-amp (LM324.pdf).

The following questions are based off of the data sheet for this op-amp.

For the following questions and experiments assume VCC+ = +5V and VCC- = 0V.

1. Knowing the non-inverting input, Vp, is at the same potential as the inverting input, Vm, (called the common-mode voltage, VCM) what are the maximum and minimum allowable common-mode voltages?

As seen from the datasheet below, at an ambient temperature of 25ºC (77ºF ~ roughly room temperature), the minimum allowable VCM is 0V and the maximum allowable VCM is V_CC – 1.5V which is 5V-1.5V = 3.5V. In summary, V_{CM, allowable min} = 0V and V_{CM, allowable max} = 3.5V.

Figure 1: LM324 Electrical Characteristics of common-mode voltage

2. What is a good estimate for the op-amp's open-loop gain? 

Based off of the table and images below we can make a decent estimate for the op-amp’s open loop gain. Let us first look at Figure 3 and notice that the open loop frequency response plot shows that there is a gain of 100dB at a frequency of 10Hz. The voltage gain plot (Figure 4) shows that at V_CC = 5V, there is a gain of approximately 100dB. The large signal voltage gain plot (Figure 5) shows that at an ambient temperature of 25ºC, there is a gain of approximately 109dB. Finally, looking at the electrical characteristics (Figure 2), we are told that there is a gain of 100V/mV (100 x 10³ = 100,000) at 25ºC. Taking the approximate value of 100dB from the plots, we know: As such, and Therefore, I believe a good estimate for this op-amp’s open- loop gain is: A_OL = 100,000.

Figure 2: LM324 Electrical Characteristics of Large Signal Voltage Gain

Figure 3: LM324 Open Loop Frequency Response (100dB gain @ 10Hz)

Figure 4: LM324 Voltage Gain (100dB gain @ 5V VCC)

Figure 5: LM324 Large Signal Voltage Gain (~109dB gain @ 25ºC)

3. What is a good estimate for the offset voltage? For worst case design what value would you use?

As we can see from the electrical characteristics for the input offset voltage (Figure 6) below, at an ambient temperature of 25ºC, there is a typical offset voltage of 2mV and a max of 5mV. Therefore, a good estimate for the offset voltage is 2mV. For worst case design, I would use 9mV as my offset voltage to consider ambient temperatures that are either very low or very high.

Figure 6: LM324 Input Offset Voltage Parameter

Build, and test, the following circuit

Figure 7: First op-amp circuit

1. What is the common-mode voltage, VCM? Does VCM change? Why or why not?

By looking at the circuit on the bottom, we can see that it is a DC circuit. This means that we can treat the capacitors as “open” in the circuit and see that it is a simple voltage divider where V_CM is just half of V_CC. Therefore, V_CM = 2.5V. V_CM does not change because V_CC does not change and neither do any of the circuit components.

Figure 8: Common-mode voltage of approximately 2.6V

2. What is the ideal closed-loop gain?

The ideal closed-loop gain is easy to calculate. This is a simple inverting topology of an op-amp and treating it as ideal means no current flows in or out of V_m or V_p. We know that an inverting op-amp topology has a gain of: Since both resistors are the same value, then that means we will have an ideal closed-loop gain of -1. For a sinusoid, this means that the output signal is going to be equal in amplitude but 180º out of phase.

3. What is the output swing and what is it centered around?

As seen below through simulation and experiment, the output swing is 100mV and it is centered around 2.5V. The reason why the amplitude is 50mV in Figure 12 is because we had the oscilloscope set to 50Ω output and so it cut the output in half. Figure 11 shows how the circuit was set up on a breadboard. Looking at Figure 13, we can see the waveforms with DC Coupling. Noticing that the “zero” for each waveform is at a different height on the horizontal axis, this means that the waveforms are not exactly swinging around the same voltage. I believe this is due to the long wires I used with the building of the circuit; picking up noise from everything in the room. This threw the output off from swinging around 2.5V.

Figure 9: LTSpice implementation of circuit

Figure 10: Resulting waveform of LTSpice simulation

Figure 11: Breadboard implementation

Figure 12: Input (yellow) and output (blue) voltage (AC Coupling)

Figure 13: Input (yellow) and output (blue) voltage (DC Coupling)

3.1. What happens if the input isn't centered around VCM, that is, 2.5 V?

If the input is not centered around the same voltage as V_CM, we see below that the output signal is no longer the same as the input and out of phase. If the input is either above +V_CC or below -V_CC then it will clip because the V_CC rails of the op-amp are what sets the maximum and minimum voltages of the output; which means that it will limit the gain as well, depending on what V_CC is set to. Below, I simulated the input with a DC offset of 2.7V and we can see that the two signals are separated with V_CM = 2.5V.

Figure 14: DC offset of input signal set to 2.7V

3.2. Provide a detailed discussion illustrating that you understand what is going on.

As seen from the above simulation images and experimental images, it becomes easier to see how an op-amp basically operates. With the input’s DC offset equal to V_CM and R_f = R_i, there will be an ideal closed-loop gain of -1. As the DC offset is swept above or below V_CM, then the input and output waveforms will separate, and the output waveform will not swing around V_CM as it should. Also, if the input has a DC offset that brings the output swing to be above +V_CC or below -V_CC, then the waveform will be clipped due to V_CC limiting how high the voltage may go in the op-amp.

4. What is the maximum allowable input signal amplitude? Why?

The maximum allowable input signal amplitude for this circuit is 2.5V. This is because the DC offset of the signal is 2.5V, +V_CC = 5V, and -V_CC = 0V. With an AC signal riding the DC, that means with an amplitude of 2.5V it will go above and below the 2.5V offset by 2.5V. This means its peak voltage will be 5V and its minimum voltage will be 0V. If the signal amplitude were any higher, then we would see it clipping.

5. What is the maximum allowable input signal if the magnitude of the gain is increased to 10? Why?

If the gain is increased to 10, then we would have and This means that to keep the output the same, the input will have to be 1/10^th the output. Therefore, if 2.5V is our output,

6. What is the point of the 0.01 µF capacitors from VCC and VCM to ground? 

The purpose of the 0.01 µF capacitors from V_CC and V_CM to ground are as decoupling capacitors. These capacitors serve to remove noise from other circuit elements by absorbing their signals and allowing them to discharge.

6.1. Are these values critical or could 0.1 µF, 1,000 pF, 1 µF, etc. capacitors be used?

These values are not critical since we are dealing with a DC voltage for V_CC and act as an open in the circuit. Either 0.1 µF, 1,000pF, or 1µF capacitors could be used.

7. The data sheet shows that this op-amp has an input bias current that flows out of the op-amp's inputs of typically 20 nA. This current flows out of both the non-inverting and inverting inputs through the resistors connected to these inputs. Show how the operation of the circuit can be affected if, for example, R1 and R2, are much larger. Explain what is going on.

If R1 and R2 were much larger, then even a small current like 20nA could cause a significant voltage drop across them and our V_CM will change. For example, if we ignore V_CC and it becomes a short, then there are two 10k resistors in parallel. Their equivalent resistance comes out to be 5kΩ and the voltage drop is This voltage is added to V_CM and will clip the output since we only have a maximum allowable signal amplitude of 2.5V. With the smaller resistors that we are using, however, is not a problem. When resistors in the MΩ (10⁶) or GΩ (10⁹) range are used, then there will be a significant voltage drop and the output of the op-amp will suffer clipping at the V_CC value.

7.1. What is the input offset current? What does this term describe?

The input offset current describes the current that is the difference between the input bias currents of the op-amp terminals. These biasing currents flowing out of the non-inverting and inverting inputs are averages values. These biasing currents make it so current does not flow into the terminals and the difference between the currents that flow out of these terminals is called the input offset current.

Explain how the following circuit can be used to measure the op-amp's offset voltage

• Note that if the output voltage is precisely the same as VCM then the op-amp has no offset voltage (this is very possible).
• To measure small offset voltages, increase the gain by increasing RF to 100k or larger. Explain what is going on.

Figure 15: Second op-amp circuit

We can see in this circuit that the inverting terminal is connected to V_CM with a 1kΩ resistor in series and that the non-inverting terminal is also connected to V_CM. If we can assume that it is an ideal op-amp, then V_m = V_CM, and there is no current flowing through the 1kΩ resistor. In this circuit, there is a gain of 20. When we find the difference between the output voltage and the common-mode voltage, we can divide that number by the gain to find our experimental offset voltage. The calculation to find the offset voltage is as follows:

Measure the offset voltage of 4 different op-amps and compare them

For the following offset voltage measurements, I used R_f = 100kΩ and R_i = 1kΩ. Therefore, the ideal closed-loop gain, A_V, is 100.

LM324 Figure 16: LM324 Breadboard implementation	Figure 17: LM324 Offset Voltage Measurement	LM348 Figure 18: LM348 Breadboard implementation	Figure 19: LM348 Offset Voltage Measurement
LM339 Figure 20: LM339 Breadboard implementation	Figure 21: LM339 Offset Voltage Measurement	LM393 Figure 22: LM393 Breadboard implementation	Figure 23: LM393 Offset Voltage Measurement

Conclusion

This lab proved to be an incredibly useful tool to learn about op-amps. We were able to look at how these devices are theoretically supposed to work; even under ideal (A_OL = ∞) and non-ideal (A_OL = finite) conditions. I have become more accustomed to looking at and understanding the datasheet for an op-amp as well. Although this lab only covered a few of the electrical characteristics of an op-amp, it was interesting to see how to measure offset voltage of the device by simple circuit manipulation. The input offset voltage could affect the output only slightly, but still affect it nonetheless and throw off measurements. Other things that may be difficult to measure, such as input bias current, can be analyzed by a thought experiment. As designers, we are more well-equipped on how to control what is a desired output of the op-amp by knowing its output swing and maximum allowable input amplitude to ensure there is no unwanted voltage clipping.

Return to EE 420L Student Labs

Return to my lab page