Lab 8 - EE 420L 

Authored by Marco Muniz,

04/08/2019

Lab description

In this lab you will characterize the transistors in the CD4007 (not the CD4007UB chip) and generate SPICE Level=1 models. Assume that the MOSFETs will be used in the design of circuits powered by a single +5 V power supply. In other words, don't characterize the devices at higher than +5 V voltages or lower than ground potential.

• Experimentally generate, for the NMOS device, plots of: 

1. ID v. VGS (0 < VGS < 3 V) with VDS = 3 V 
2. ID v. VDS (0 < VDS < 5 V) for VGS varying from 1 to 5 V in 1 V steps, and 
3. ID v. VGS (0 < VGS < 5 V) with VDS = 5 V for VSB varying from 0 to 3 V in 1 V steps. 

• Note that for this last one, if VSS (NMOS body) is ground (again, the Body, VB, is grounded) then the source voltage will be varied from 0 to 3 V in 1 V steps to realize VSB ( = VS - VB = VS) varying from 0 to 3 V in 1 V steps. At the same time VGS will be varied from 0 to 3 V (when VS = 0), 1 to 4 V (when VS = 1 V), 2 to 5 V (when VS = 2 V), and 3 to 5 V (when VS = 3 V). In other words, as VS is increased by 1 V the VGS has to shift up by 1 V as well.
• Assuming that the length of the NMOS is 5 um and its width is 500 um calculate the oxide thickness if Cox (= C'ox*W*L) = 5 pF.
• From this measured data create a Level = 1 MOSFET model with (only) parameters: VTO, GAMMA, KP, LAMBDA, and TOX.
• Compare the experimentally measured data above (the 3 plots) to LTspice-generated data (again, 3 plots) and adjust your model accordingly to get better matching.
• Experimentally, similar to what is seen on the datasheet (AC test circuits seen on page 3 of the datasheet), measure the delay of an inverter using these devices (remember the loading of the scope probe is around 15 pF and there is other stray capacitance, say another 10 pF).
• Using your model simulate the delay of the inverter and compare to measured results. Adjust your SPICE model to get better matching between the experimental data and the measured data.
• Repeat the above steps for the PMOS device where VDS, VGS, and VSB are replaced with VSD, VSG, and VBS respectively.

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**NOTE ALL CURRENT MEASUREMENTS ARE IN mA range.

EXPERIMENT 1 NMOS:

1. ID v. VGS, VGS varies from 0 to 3V, VDS = 3V

 To generate the ID vs. VGS plot, VGS is connected to the function generator with a waveform that varies from 0 to 3V, while VDS is set to 3V. From here, we placed the multimeter in series with the source of the mosfet to ground in order for us to get a current reading at each interval of VGS. 

Schematic:

Experimental Plot:

  Comparing our simulated and experimental results, we can see that the plots have a similar VTO but our experimental reach a slightly higher current level at 3V. Experimentally, we see a current of 1.65mA but in the simulation, we were seeing a current of about 1.65mA. While the difference isn't very large, we adjusted our Kp to get a more exact comparison.

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2. ID v. VDS, VDS varies from 0 to 5V, VGS values from 1 to 5V in 1V steps

To set up this circuit, we placed a voltage range of 0 to 5 V while the gate was supplied with 1 - 5 V in 1V increments. From there, we grounded the source and placed the ammeter in series with the drain in order to measure Id. Our current measurements were taken at each voltage increment of 0.1V and then plotted in excel.
   

Schematic:

VGS 1 = Light Green

VGS 2 = Dark Blue

VGS 3 = Magenta

VGS 4 = Teal

VGS 5 = Purple

Experimental Plots:

VGS = 1

VGS = 2

VGS = 3

VGS = 4

VGS = 5

Comparing our results, we see a saturation point of about 1.55-1.60mA which shows our simulation model operates correctly. Although, we did see a difference in the higher VSD points. Comparing our VGS=5 plots shows a current difference of about 2mA from the experimental (6mA) to the simulation (8mA)

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Calculations Nmos Model:
Assume l = 5um and w = 500um, lets find parameters: VTO, GAMMA, KP, LAMBDA, and TOX

VTO 
Looking at part 1, we can estimate VTO = 1.45V, while data measured in part 2 and VGS is at 3V IDsat can bee seen as approximately  IDsat = 1.56mA

KP
Kpn = ID*2*(L/W)/(VGS-VTO)^2 = 1.56mA*2*0.01/(1.6)^2  then KPn = 12.11uA


Lambda
Lambda = slope/IDsat where slope = (1.6541mA - 1.56mA)/(5-1.5) = 0.02689mA/V. Then Lambda = 0.01723 A/V

TOX
tox = Eox/C'ox where Eox = Er*Eo = 3.9*8.85*10^(-18)F/um = 3.4515*10^(-17)F/um where C'ox = 15pF/(5*500*10^(-12)) = 0.667fF/um^2 , here we used 15pF for Cox from the datasheet of CD4007UBE.
resulting in tox = 51.74nm

GAMMA
g = sqr(2*q*Es*NA)/sqr(C'ox) = sqr(0.000496768) then gamma = 0.0222V
   

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3. ID v. VGS, VGS varies from 0 to 5V, VDS = 5V, and VSB changes from 0 to 3V in 1V steps.

For this circuit, we placed a 5V supply onto the drain and grounded the body while the source is supplied with a voltage of 0-3V in 1V increments. The gate voltage will be varied from 0-3V for VS=0, 1-4V for VS=1V, 2-5V for VS=2V, and 3-5V for VS=3V

Schematic: 
  

Experimental: 

Overall, our waveforms had very similarly shapes but we did see some larger jumps in current in the simulated results compared to our experimental results such as the current points of VGS = 3.

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EXPERIMENT 2 PMOS:

1. ID v. VGS, VGS varies from 0 to 3V, VDS = 3V

 To generate the ID vs. VGS plot, VGS is connected to the function generator with a waveform that varies from 0 to 3V, while VDS is set to 3V. From here, we placed the multimeter in series with the source of the mosfet to ground in order for us to get a current reading at each interval of VGS. 

Schematic:

Experimental Plot:

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2. ID v. VDS, VDS varies from 0 to 5V, VGS values from 1 to 5V in 1V steps

Schematic:

VSG 1 = Purple

VSG 2 = Light Blue

VSG 3 = Magenta

VSG 4 = Dark Blue

VSG 5 = Light Green

Experimental Plots:

VSG = 1

VSG = 2

VSG = 3

VSG = 4

VSG = 5

The main difference we saw between our simulated and experimental results was that the calculated VTO for the model might be slightly too high since we know for a fact we should have some current flowing at VSG = 2 from the experimental plots.

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Calculations Pmos Model:
Assume l = 5um and w = 500um, lets find parameters: VTO, GAMMA, KP, LAMBDA, and TOX


VTO 
By observation of the data measured in part 1 VTO = -1.65V, while data measured in part 2 and VSG is at 3V IDsat can bee seen as approximately  IDsat = 0.90mA

KP
Kpn = ID*2*(L/W)/(VGS-VTO)^2 = 0.87mA*2*0.01/(1.6)^2  then KPn = 6.6uA


Lambda
Lambda = slope/IDsat where slope = (1.05mA - 0.87mA)/(5-2) = 0.06mA/V. Then Lambda = 0.063/V

TOX
tox = Eox/C'ox where Eox = Er*Eo = 3.9*8.85*10^(-18)F/um = 3.4515*10^(-17)F/um where C'ox = 15pF/(5*500*10^(-12)) = 0.667fF/um^2 , here we used 15pF for Cox from the datasheet of CD4007UBE.
resulting in tox = 51.74nm

GAMMA
g = sqr(2*q*Es*NA)/sqr(C'ox) = sqr(0.000496768) then gamma = 0.0222V

Experiment 3: Characterization of CMOS Inverter (CB4007UB)

Schematic: 

Experimental: 

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