Lab 6 - EE 421L 

Authored by Marco Muņiz,

03/27/2019  

  

Lab description

  

Single-stage transistor amplifiers

The report is split up into four parts, detailing the theory and operation of each of the following four amplifier configurations:

    

Part 1: Source Follower (Common Drain) amplifiers 

Part 2: Common Source amplifiers 

Part 3: Common Gate amplifiers

Part 4: Push-Pull amplifier

  

Each part should include:

  

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Part 1: Common Drain Amp   

  

This Amplifier is called the Common Drain Amplifier, also known as the Source Follower due to the gain of one. The way this amp is set up gives it an inherently large input resistance and a fairly low output resistance. This will be shown in the hand calculations for this circuit.The name comes from the fact that the drain of each of the MOSFET's is common to the input and output.

  

file:///C:/Users/mmuni/Pictures/Lab6/part1.JPG

  

**We must note that when using Electrolytic Capacitors in these circuits, the Positive end of the Capacitor (+) should be connected to the higher DC Voltage so that we do not create a reverse reaction in the capacitor and breakdown the insulator layer, thus ruining the capacitor.

    

  

DC Operating Calcs:

  

file:///C:/Users/mmuni/Pictures/Lab6/part1calc1.JPGfile:///C:/Users/mmuni/Pictures/Lab6/part1calc2.JPG

  

Gain, Input/Output Resistance Hand Calcs:

  

file:///C:/Users/mmuni/Pictures/Lab6/part1calc3.JPGfile:///C:/Users/mmuni/Pictures/Lab6/part1calc4.JPG

   

DC Operating Simulation Results:

file:///C:/Users/mmuni/Pictures/Lab6/DC_OPvalues.JPG   file:///C:/Users/mmuni/Pictures/Lab6/dc_GM.JPG

 
  

GAIN Sim Results:

  


file:///C:/Users/mmuni/Pictures/Lab6/part1_spice.JPG

NMOS Gain = 0.95

PMOS Gain = 0.90

  

In order to measure the input and output resistance, we must find the current entering and leaving, the input and output, and divide the input voltage or output voltage by this current to solve for the resistance. 

  

  

EXPERIMENTAL RESULTS: 

  

For the experimental portion, we will need to measure the input and output resistance a little differently than we did in the simulations. This is due to the fact that we do not have probes which measure current available. 

  

For INPUT resistance: 

  1. Place a Resistor, of the same value calculated in the hand calculation portion, in series with the input capacitor. However, make sure to place this resistor before the input capactior since this capacitor is here to protect the DC bias on the gate. 
  2. We then measure the voltage at the output of this resistor
  3. Due to the voltage divider created between the Input Resistance and the added resistor, we will see a input voltage drop of roughly half. This half value will only be correct if the chosen resistor is the same value as the calculated input resistance. 
  4. If you are far from the half point, we can use the "Voltage Divider Equation" to solve for the Input resistance.

 For OUTPUT resistance:

  1. We will connect a Resistor, of the same value as our calculated Output Resistance, in parallel to the output resistor along with a large capacitor. This large capacitor will be here to protect from any changes to the DC Bias voltage. 
  2. Once this is done, we will measure the output of the amp again. The measured value should be half of the original gain due to the voltage divider created by the parallel resistance. 
 
For these plots, We have set the input as CH1(Yellow) and output as CH2(Blue)
NMOS
  file:///C:/Users/mmuni/Pictures/Lab6/part1_NmosGain.JPG
                                                (NMOS Gain)
 
file:///C:/Users/mmuni/Pictures/Lab6/part1_NmosRin.JPG
                                                         (NMOS Rin)
 
file:///C:/Users/mmuni/Pictures/Lab6/part1_NmosRout.JPG
                                             (NMOS Rout)
 

PMOS
  file:///C:/Users/mmuni/Pictures/Lab6/part1_PmosGain.JPG
                                                 (PMOS Gain)
 
file:///C:/Users/mmuni/Pictures/Lab6/part1_PmosRin.JPG
                                                      (PMOS Rin)
 
file:///C:/Users/mmuni/Pictures/Lab6/part1_PmosRout.JPG
                                                 (PMOS Rout)
 
NMOSPMOS
TheoreticalSimulationExperimentalTheoreticalSimulationExperimental
GAIN0.95 = 10.950.910.96 = 10.900.62
RIN33.3k Ohm33.3k Ohm27k Ohm33.3k Ohm33.3k Ohm30k Ohm
ROUT53 Ohm56 Ohm60 Ohm88 Ohm89 Ohm92 Ohm

 
  
_____________________________________________________________________________________________________________
 
 
Part 2: Common Source Amp
 
Common source amplifiers have the input through the gate and the output in the drain with the source being common to both drain and gate. However, this type of amp has some drawbacks that make is less attractive. One major drawback is that our output resistance is not high enough for this to be used as a transconductance Amp. Furthermore, this amp does not have a large high frequency response.
 
file:///C:/Users/mmuni/Pictures/Lab6/part2.JPG 
 

Gain, Input/Output Resistance Hand Calcs:

  

file:///C:/Users/mmuni/Pictures/Lab6/part2_calc1.JPG file:///C:/Users/mmuni/Pictures/Lab6/part2_calc2.JPG  

 

GAIN Sim Results:

  

file:///C:/Users/mmuni/Pictures/Lab6/part2_spice.JPG  

NMOS Gain = 6.94                  

PMOS Gain = 4.83

Experimental Results: 

  

For these images, CH 3(Magenta) will be the input and CH 4(Green) will be the output.

 

NMOS 

  file:///C:/Users/mmuni/Pictures/Lab6/part2_NmosGain.JPG

                                               (NMOS Gain)

 file:///C:/Users/mmuni/Pictures/Lab6/part2_NmosRin.JPG

                                              (NMOS RIN)

  

file:///C:/Users/mmuni/Pictures/Lab6/part2_NmosRout.JPG

                                           (NMOS Rout)

  

PMOS

file:///C:/Users/mmuni/Pictures/Lab6/part2_PmosGain.JPG  

                                        (Pmos Gain)

  

file:///C:/Users/mmuni/Pictures/Lab6/part2_PmosRin.JPG

                                             (Pmos Rin)

  

file:///C:/Users/mmuni/Pictures/Lab6/part2_PmosRout.JPG

                                          (Pmos Rout)

  



 

NMOSPMOS
TheoreticalSimulationExperimentalTheoreticalSimulationExperimental
GAIN-6.83-6.94-4.33-5.24-4.83-3.14
RIN33.3k Ohm33.3k Ohm30k Ohm33.3k Ohm33.3k Ohm33k Ohm
ROUT1k Ohm987 Ohm1k Ohm1k Ohm994 Ohm1k Ohm

 
 
________________________________________________________________________________________________________________________________________
 
 
Part 3: Common Gate Amp
 
A common gate amplifier uses the source of the MOSFET as input, the drain as the output, and the gate as the common for both source and drain. This Amp is a type of current buffer amp but is commonly used due to issues with impedance matching.
 
file:///C:/Users/mmuni/Pictures/Lab6/part3.JPG  

Gain, Input/Output Resistance Hand Calcs:

  

file:///C:/Users/mmuni/Pictures/Lab6/part3_calc1.JPGfile:///C:/Users/mmuni/Pictures/Lab6/part3_calc2.JPG   

  

GAIN Sim Resutls:

  

file:///C:/Users/mmuni/Pictures/Lab6/part3_spice.JPG

NMOS Gain = 6.23 

PMOS Gain = 4.77

  

 

Experimental Results: 

  

For these plots, we have set the input as CH1(Yellow) and the output as CH2(Blue) 

NMOS

file:///C:/Users/mmuni/Pictures/Lab6/part3_NmosGain.JPG

                                                 (NMOS Gain)

  

file:///C:/Users/mmuni/Pictures/Lab6/part3_NmosRin.JPG

                                               (NMOS Rin)

  

file:///C:/Users/mmuni/Pictures/Lab6/part3_NmosRout.JPG

                                             (NMOS Rout) 

  

PMOS

file:///C:/Users/mmuni/Pictures/Lab6/part3_PmosGain.JPG

                                               (PMOS Gain)

  

file:///C:/Users/mmuni/Pictures/Lab6/part3_PmosRin.JPG

                                                      (PMOS RIN)

  

file:///C:/Users/mmuni/Pictures/Lab6/part3_PmosRout.JPG

                                                  (PMOS Rout)

    



NMOSPMOS
TheoreticalSimulationExperimentalTheoreticalSimulationExperimental
GAIN6.246.233.724.774.771.52
RIN152 Ohm155 Ohm160 Ohm191 Ohm190 Ohm200 Ohm
ROUT1k Ohm987 Ohm1k Ohm1k Ohm994 Ohm1k Ohm

 
 
_____________________________________________________________________________________________________________
 
Part 4: Push-Pull Amp
 
A push pull amplifier has two tranistors that alternatly supply or absorb current from a load. This design allows for a higher output power then the previous amplifiers, however the design requires a phase splitting component which makes then very tricky to work with, as we will see below.
 
file:///C:/Users/mmuni/Pictures/Lab6/part4.JPG 

Yes, this amp would be great at sourcing/sinking current because we will always have at least one MOSFET that is on to allow current movement. 

   

If the resistor is replaced witha 510k resistor, the gain of the amp should increase dramatically since the current will drop to a lower amount. In this amp, the current and gain are Inversely Proportional to each other. 


 

Gain, Input/Output Resistance Hand Calcs:

  

file:///C:/Users/mmuni/Pictures/Lab6/part4_calc.JPG

  

 

GAIN Sim Resutls:

  file:///C:/Users/mmuni/Pictures/Lab6/part4_spice.JPG

Gain = 1.910k  

  

 

Experimental Results: 

  

file:///C:/Users/mmuni/Pictures/Lab6/part4_gain.JPG

                                          (Push-Pull Gain)

  

Gain = 133.3 

  

For the Push-Pull Amp, we were having difficulty reaching a gain close to our theoretical and calculated values. We were not sure if the issue was with the oscilloscope having problems reading really low amplitude signals. As you can see in the image above, we were measuring 13.6 mV but our Vin signal was set to 3.5 mV so we were expecting a gain of closer to 550. Although, even at a gain of 550, we would still be pretty far off from the simulated gain of about 2k. 

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