Lab 3 - EE 420L 

Authored by Your Name, Cody McDonald

Today's date 2/19/19

E-mail: mcdonc4@unlv.nevada.edu

 

This lab report contains the following:

-      Lab instructions

-      Part 1: LM324 Operational Questions

-      Part 2: Basic Op-amp analysis

-      Part 3: Offset voltage measurements of 4 different Op-Amps

-      Part 4: Conclusion

 

Lab instructions:

 

Lab instructions can be viewed and referenced from here

 

Part 1 – LM324 Operational Questions

This lab will utilize the LM324 op-amp (LM324.pdf).

Review the data sheet for this op-amp.

For the following questions and experiments assume VCC+ = +5V and VCC- = 0V.

This data can be found in the datasheet for the LM324. The  is the input common voltage range, which explains precisely what the maximum and minimum allowable common-mode voltages are. At an ambient temperature of  the minimum allowable  is 0V and the maximum allowable is . Therefore, the maximum allowable voltage is:

  .

 

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Figure 1: Common mode input voltage range

 

We can use the information detailed in the datasheet provided with the op-amp to estimate the devices open-loop gain. The open loop frequency response detailed below shows that at 1kHz the open-loop gain will be about 60dB. Or given  we will have a gain of 1000. Given this information and the support from the graph, we can say that 1000 is a fair estimate for the . Using figure 2 and 4 we can determine that the voltage gain at  is approximately 108dB, and that using figure 3, the gain is 100dB at an entry voltage at most power supply voltages.

 

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Figure 2: Large signal voltage gain

 

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Figures 3,4,and 5: Voltage Gain(left), Large Signal Voltage Gain(center), Open Loop Frequency Response(right)

 

Given an ambient temperature of  we should expect a 2mV as the typical offset voltage. I would assume a voltage of 9mV as the worst-case scenario as indicated in the table.

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Figure 6: Input offset voltage table

 

Part 2 – LM324 Operational Questions


Build, and test, the following circuit. Note that a precise value for the 5k resistors isn't important. You can use 4.7k or a 5.1k resistors.

fig1.jpghttp://cmosedu.com/jbaker/courses/ee420L/s19/students/reedj35/lab3/lab3_files/image039.jpg

Figures 7 and 8: Circuit schematic in question(left) and the LTSpice simulated circuit(right)

 

The common-mode voltage is the voltage at which the small signal voltage will oscillate. In the circuit above we have 2.5V as our. This is created by the voltage divider below the op-amp.

 http://cmosedu.com/jbaker/courses/ee420L/s19/students/reedj35/lab3/lab3_files/image030.jpg

Figure 9: 2.5V DC offset indicated in our oscilloscope measurement

 

Given the we are using the topology of an inverting op-amp, the gain can be calculated as follows

The output swing is 100mV as indicated by the SINE wave input signal in the simulation and is centered around 2.5V. The simulation of the circuit can be observed in figures 10,11, and 12. Our oscilloscope measurements produced smoother waves while the function generator was functioning on the 50 mode, so all inputs and outputs were cut in half.

 

 can be calculated as follows since it is a voltage divider:

 

http://cmosedu.com/jbaker/courses/ee420L/s19/students/reedj35/lab3/lab3_files/image041.jpg

Figure 10: LTSpice simulation output for Vout and Vin

 

http://cmosedu.com/jbaker/courses/ee420L/s19/students/reedj35/lab3/lab3_files/image046.jpg
Figure 11: DC coupled oscilloscope measurement of the circuits input and output. It can be observed that our offset is slightly off. This is due to the noise being received from the circuit implemented on the breadboard. Long wires that cross each other can pick up ambient noise from neighboring electronics, which can affect the signal. Theoretically the offsets will be exactly the same for both the input and output.

 

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Figure 12: AC coupled oscilloscope measurement of the inputs and outputs of the circuit.

 

If the input isn’t centered around  then the small signal input and output swings would oscillate around a different DC offset. This can be more easily observed below in figure 13. A simple change in  produces a different point for the small signal to swing about. In the case below, the common mode voltage is switched from 2.5V to 3.0V.

Figure 13: DC offset change

 

The op-amp is receiving a VCM of 2.5V, which is the voltage that the small signal of 100mV will oscillate around. The gain of the circuit is determined by , which indicates that the output signal will experience a  phase shift as indicated in figures 10-12. Additionally, the op-amp is being operated with a  and a , so the max input AC voltage can’t exceed 2.5V. The max amplitude can’t exceed 5V combined. Any higher and we can observe clipping in the circuit.

 

Maximum allowable input signal would be a 10th of what was previously stated. We don’t want the total amplitude to exceed 5V, so we must limit the input to .

 

The capacitors serve as decoupling capacitors. In short, these components serve to limit the amount of noise experienced by the circuit by discharging any noise detected. The specific values are also not critical and either of the values listed can be used.

 

Larger amounts of resistance will lead to much larger voltage drops, which when added to VCM can lead to an output that is greater than the before specified max input voltage. If the resistors are increased to the gigaohm or megaohm range, then the circuit may experience a different Vcm and may also experience clipping. The input offset current is the difference between the input bias current at the terminals of the op-amp. As indicated in the below chart, the typical input offset current is 2nA. These currents are intended to make sure that current does not flow into the terminals.

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Figure 14: input offset current

 

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Figure 15: Our op amp circuit implemented onto a breadboard

 

 

 

Part 3 – Offset Voltage Measurements of 4 different Op-Amps:

 

-      Explain how the following circuit can be used to measure the op-amp's offset voltage.

The following circuit can be used to measure the inputs offset voltage by observing the topology of the circuit. The inverting terminal is in series with a 1k resistor and the non-inverting terminal is connected to VCM. Given the equation for gain that was previously stated for an inverting topology, we know the gain is -20. Using this information we can ascertain that the equation for the offset is

 

fig2.jpg

Increasing Rf to 100k will lead to a gain of 100. This is due to the equation for gain for this specific topology as . The increase in gain will make a more visible difference in offset voltage.

 

Measure the offset voltage of 4 different op-amps and compare them.

 

LM324

http://cmosedu.com/jbaker/courses/ee420L/s19/students/reedj35/lab3/lab3_files/image076.jpg http://cmosedu.com/jbaker/courses/ee420L/s19/students/reedj35/lab3/lab3_files/image080.jpg

http://cmosedu.com/jbaker/courses/ee420L/s19/students/reedj35/lab3/lab3_files/image087.jpg

 

 

LM393N

http://cmosedu.com/jbaker/courses/ee420L/s19/students/reedj35/lab3/lab3_files/image105.jpg http://cmosedu.com/jbaker/courses/ee420L/s19/students/reedj35/lab3/lab3_files/image108.jpg

http://cmosedu.com/jbaker/courses/ee420L/s19/students/reedj35/lab3/lab3_files/image111.jpg

http://cmosedu.com/jbaker/courses/ee420L/s19/students/reedj35/lab3/lab3_files/image117.png

LM339AN

http://cmosedu.com/jbaker/courses/ee420L/s19/students/reedj35/lab3/lab3_files/image098.jpg http://cmosedu.com/jbaker/courses/ee420L/s19/students/reedj35/lab3/lab3_files/image099.jpghttp://cmosedu.com/jbaker/courses/ee420L/s19/students/reedj35/lab3/lab3_files/image104.jpg

http://cmosedu.com/jbaker/courses/ee420L/s19/students/reedj35/lab3/lab3_files/image113.png

LM348N

http://cmosedu.com/jbaker/courses/ee420L/s19/students/reedj35/lab3/lab3_files/image088.jpghttp://cmosedu.com/jbaker/courses/ee420L/s19/students/reedj35/lab3/lab3_files/image090.jpg

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 Part 4 – Conclusions

This lab presented an invaluable insight into the realistic operation of op-amp devices. Accounting for the offset in an op-amp device allows the observer to be able to account for differences between their theoretical and actual observations when designing a circuit. By testing for the offset in the 3rd portion for the lab we were also able to see that the measured offsets feel within the ranges listed in the datasheets making them a reliable source to reference when designing circuits. It was also refreshing to see the comparison of ideal and non-ideal op-amp observations, and how they can change the outcomes of your circuit design.

 

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