Lab 6 - ECE 420L 

Authored by Kyle Butler, butlerk2@unlv.nevada.edu

3/27/2019


Pre-lab work: 

Lab work:


Part 1: Common Drain Amplifier
The common drain amplifier is also known as the source followers amplifier. This is because the expected gain is 1 and the output
'follows' the source. The drain is shared or common between the NMOS and PMOS giving the name common drain amplifier.

Schematic:
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/common_drain.JPG

Simulations:
Circuit Operation
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/cd_vout.JPG
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/cd_voutp.JPG
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/cd_vin.JPG

DC operation for hand calculations
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/dc_sim.JPGhttp://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/dc_error.JPG

 
Hand Calculations:
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/cd_nmos.JPG
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/cd_pmos.JPG

When building the circuit we used electrolytic capacitors because those were the only type avaible in lab. As recommended
we put the "+" terminal at the gate of the MOSFET. We did this because the other orientation would cause a reverse the dielectric
insulation separating the interior plates to breakdown. The AC voltage will cause an unwanted chemical reaction unless the positive
terminal is connected to the higher potential DC voltage.

Experimental Results:
NMOSPMOS
GAINhttp://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/gain_nmos_1.JPGhttp://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/gain_pmos_1.JPG
RINhttp://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/rin_nmos_1.JPGhttp://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/rin_pmos_1.JPG
ROUThttp://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/rout_nmos_1.JPGhttp://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/rout_pmos_1.JPG

Summary:
HANDEXP
GAIN NMOS1V/V0.91 V/V
GAIN PMOS1V/V0.62 V/V




Part 2: Common Source Amplifier
Schematic:
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/cs.JPG

Simulations:
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/cs_voutp.JPG
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/cs_voutn.JPG
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/cs_vin.JPG

Hand Calculations:
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/cs_nmos.JPG
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/cs_pmos.JPG

Experimental Results:
NMOSPMOS
GAINhttp://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/gain_nmos_2.JPGhttp://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/gain_pmos_2.JPG
RINhttp://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/rin_nmos_2.JPGhttp://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/rin_pmos_2.JPG
ROUThttp://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/rout_nmos_2.JPGhttp://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/rout_pmos_2.JPG

Summary:
HANDEXP
GAIN NMOS6.83V/V4.3V/V
GAIN PMOS5.24V/V3.08V/V


Part 3: Common Gate Amplifier

Schematic:
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/cg.JPG

Simulations:
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/cg_voutp.JPG
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/cg_voutn.JPG
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/cg_vin.JPG

Hand Calculations:
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/cg_nmos.JPG
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/cg_pmos.JPG

Experimental Results:
NMOSPMOS
GAINhttp://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/gain_nmos_3.JPGhttp://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/gain_pmos_3.JPG
RINhttp://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/rin_nmos_3.JPGhttp://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/rin_pmos_3.JPG
ROUThttp://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/rout_nmos_3.JPGhttp://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/rout_pmos_3.JPG

Summary:
HANDEXP
GAIN NMOS6.24V/V3.77V/V
GAIN PMOS4.77V/V1.5V/V


Part 4: Push Pull Amplifier
Schematic
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/push.JPG


Simulations:
100k:
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/push_100k.JPG

510k:
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/push_510k.JPG

Do you expect this amplifier to be good at sourcing/sinking current? Why or why not?
Since at least one transistor is on at all times, the amplifier will be fine sourcing/sinking current.


What happens to the gain if the 100k resistor is replaced with a 510k resistor? Why?
The gain is much larger with the 510k resistor because the transistor sees a lower current. The gain is so much larger its hitting the rails.

Hand Calculations:
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/push_pull.JPG

Experimental Results:
http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Lab%206/push_gain.JPG

Summary:
HANDEXP
GAIN2.8KV/V2.04/0.028 = 72V/V



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