Project - EE 420L 

Authored by: Andrew Buchanan

buchaa2@unlv.nevada.edu

5/8/2019

  

Project – design a voltage amplifier with a gain of 10 using either the ZVN3306A or ZVP3306A (or both) MOSFETs and as many resistors and capacitors as you need. You should try to get as fast a design as possible driving a 1k load, with an input resistance greater than 50k, with as large of output swing as possible. AC coupling input and output is okay as long as your design can pass a 100 Hz input signal. Your report, in html, should detail your design considerations, and measured results showing the amplifier's performance. Your design can draw no more, under quiescent conditions (no input signal), than 1 mA from a +9 V supply voltage. Your report is due at the beginning of lab on Wednesday, May 8. Access to your CMOSedu.com lab accounts will be removed at this time.
 

Lab Report

  

 Trying to decide which amplifier to use on this project was the hardest part.  We started by looking at lab 6 where we looked at all the different amplifiers and decided to use the push pull because is can reach the gain we want and drive a load.

          Forcing our current below 1mA DC is what restricted the most. We chose to use a 0.8mA current then worked through the hand calculations.  This is the topology we started with.

We learned from simulation and from Dr. Baker that the circuit is good at sourcing current but is bad a sinking current. This this is because the resistor on the bottom that sets the ID is connected to the NMOS. If we split the resistor across to the PMOS so both sources of the MOSFETs are tied to a resistor then the circuit sources and sinks current equally. We also divided up the AC resistor across to the PMOS to help.

 

The new topology looks like this

The hand calculations for this topology are:

This is the calculations for our input resistance:

There were no 1G resistors in the lab so we used a 30Meg resistor which results in a 2.7MegOhm resister

Kpn = 0.1233

Vthn = 1.824V

Kpp = 0.145

Vthp = 2.875V

 

From the above information we have the simulated circuit below

  

From simulation we have a gain of 10 which is what we want, but from simulation to experimental things change.

 

Experimental:

http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Project/circuit.JPG

  http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Project/e_result.JPG

http://cmosedu.com/jbaker/courses/ee420L/s19/students/butlerk2/Project/meter.JPG

From the experimental we can see a gain of about 8.7. the input on the Oscope is supposed to be 100mv but reads 228mV which kills some of the gain. We tried throwing the whole circuit away and starting with a higher current. The current was measured out to be 2.07/2200 = 0.94mA, but we ended up with a gain of 6 so we resulted back to the old circuit.

 

We missed the gain experimentally, but hit it right on the mark for simulation and hand calculations. Kyle thought it might have been due to the 20% error allowed in these resistors and must have changed the overall gain. I think it might have been the bread board we were using because the gain was changing based on which port on the board we plugged into. The push pull seems to be very sensitive and has proven to be a difficult amplifier to work with.

 

This lab demonstrated how the push pull amplifier can draw very little current and very effectively amplify a voltage. This can be very useful in future projects that deal with low power and low current draw with high gain.

 

 

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