Lab 9 - EE 420L
Andrew Buchanan
In
this lab you may need to use two,
or more, CD4007 chips from the same production lot (see date code on the top of
chip) to ensure using a BMR to bias a current mirror is possible. If the CD4007
chips are not from the same production lot they will
not "match" so current mirrors will not be possible.
- Build your BMR
design and characterize it as you did in the pre-lab (if you use two chips
ensure that grounds and VDDs of both chips are tied
together).
- You
expect the BMR to become unstable if there is a large capacitance across
the resistor, such as a scope probe (important), so care must be
exercised
- Use your BMR to
bias, and thus create, a:
- NMOS
current mirror
- PMOS
current mirror
- Measure how the
current varies through each current mirror as the voltage across the
mirror changes.
- Of
course the current in the NMOS (PMOS) current mirror goes to
zero as the voltage on the drain of the output device moves towards
ground (VDD)
- Using these
current mirrors drive two gate-drain connected transistors
- For
the first experiment use the NMOS current mirror to drive two PMOS
gate-drain connected devices.
- Use
the voltages on the gate-drain connection of the two devices to bias a cascode current mirror (characterize this mirror as
before)
- For
the second experiment switch, that is, use the PMOS current mirror to
drive two NMOS gate-drain connected devices.
- Again,
use these two voltages to bias an NMOS cascode
current mirror then characterize.
The resistor value is
chosen based on the following reasoning:
After building this circuit with two CD4007UB chips on the
breadboard I measured the voltage at Vbiasn, Vbiasp, and the voltage across the resistor to measure the
current Iref.
Tables measurement and spice models below
The NMOS and PMOS
current mirrors:
To measure the current experimentally through the NMOS and PMOS
devices in the current mirrors a resistor was placed in between vdd and the mosfet. The resistor drop
was measured and then the resistance was divided out:
The first few values are zero because they averaged out to
be insignificant compared to the rest of the data
The simulations don’t match the measurement as they are smaller than
the measured values. This could be caused by the way I measured it, or there
could be something wrong with the simulation.
NMOS
current mirror driving two gate-drain connected PMOS devices and a PMOS
current mirror driving two gate-drain connected NMOS devices:
We can see in the simulation that the threshold voltage is raised
about a Volt
Conclusion:
I have learned the importance of simulation in design and that they
don’t always match up, so when you are doing a design problem you always have
to account for this and remember that no real life measutment
is going to match the theory if you want something accurate you must calculate,
simulate, measure, and repeat.