EE 420L Engineering Electronics II Lab – Lab 6

Single-Stage Transistor Amplifiers

 

Authored by Shadden Abdalla

Email: abdals1@unlv.nevada.edu

March 27, 2019

 

 

Prelab work:

 

 

Real lab work:

 

Circuit 1- Source Follower / Common Drain Amplifier:

 

1.            Discuss the operation of these amplifiers:

 

The source follower is a type of buffer circuit. It is also considered a common drain amplifier. This circuit is used to conduct a low output impedance and a higher input impedance. The gate of the NMOS is the input, the drain is connected and is common and the source is the input. The way the source follower works is that input of Vin goes into the gate of an NMOS and the drain is connected to VDD and the output is on the output. The DC voltage is found by using the voltage divider equation to find the voltage at the gate of the NMOS. You can then find Vout by multiplying the current by 1k. You can find the drain current and Vout by using the two equations:

 

 and . Then you can find the input resistance by finding 50k and 100k in parallel and you can find the output resistance by calculating 1/gm of the NMOS in parallel with 1k.  is the equation to use in order to find VGS in this circuit. The gain is .

 

2.           Hand calculate and then verify the hand calculations with experimentation and simulations, the gains and the input and output resistances ensuring that your test signals are at a high enough frequency that the caps have negligible impedance but not so high that the gain is dropping off.

 

To the left are the gm values from LTSpice. The values of m2 represent the NMOS and the values of m1 represent the PMOS. The gm values are used for calculating the output resistance.

 

 

 

 

 

 

 

 

 

 

 

 

 

Circuit 1: PMOS CALCULATIONS – source follower

 

Kpp = 0.145A/V^2

Vthp = 2.875V

 

Rin:   = Rin

Rout:  =  = 93.45 || 1k = = 82.47 ohms = Rout

Gain:   = gain of 1

 

DC Bias:

 

 

 

 

 

 

 

 

 

 

 

AC analysis:

 =

=0.999 = gain of 1

 

 

Circuit 1: NMOS CALCULATIONS – source follower

 

Kpn = 0.1233A/V^2

Vthn = 1.824V

 

Rin:   = Rin

Rout:  =  = 54.64 || 1k = = 51.831 ohms = Rout

Gain:   = gain of 1

DC Bias:

 

 

 

 

 

 

 

 

 

 

AC analysis:

 =

= 0.947 = gain of 1

 

Discuss how to measure the input resistance: For measuring the input resistance add a resistor equal to the value you calculated between the input voltage source and the amplifier. I added a resistor equal to the one I calculated and then measured the voltages on each side of the resistor. Once I have the voltages, I can find the voltage drop across the resistor and calculate the current using the voltage drop and the resistor value. Then, I can find the input resistance by dividing the current by dividing Vout by the current to find the input resistance. Finding the AC current will allow us to find the input resistance.

Discuss how to measure the output resistance: To measure the output resistance I added a resistor at the output equal to the one I calculated from the output to ground. Then, using the voltage divider theory I would measure the output voltage. If the output resistance is the proper one, then the output will be half because the voltage divider would go through both identical resistors and split the input voltage in half.

 

Below are the LTSpice simulations of the output voltage of the PMOS and NMOS circuits as well as the input signal to both. In this case we used 100mV input signal.

 

 

PMOS EXPERIMENTAL RESULTS – SOURCE FOLLOWER

 

VoutP – This is the output on the PMOS side of this circuit. You can see that the gain is 1 which matches the calculations above. The input signal is the yellow one and the output signal is the blue one.

 

 

PMOS VS and VG (VSG) – The source voltage of the PMOS is in blue and is 4.64V. The gate voltage of the PMOS is yellow and is 1.76V. Since VSG = VS – VG, VSG measures to be 2.88V.                                                                            

                  

 

PMOS RIN of 33.33k       (39.42kohm)                                  PMOS AC Input Voltage    (54.4mV)                                    

 

 

To measure input resistance: We found Rin to be 33.33k so we added a 33.33k resistor and a capacitor to measure the voltage drop across the resistor. We can see the input to be 100mV and the delta of the AC input signal is 54.4mV. So the voltage drop is 100mV – 54.4mV = 45.6mV. Then to find the AC current we know that V=IR, so

 

I = (45.6mV / 33.33k) = 1.368uA. Rin = (vout / I) = 54.4mV / 1.38uA = 39.42kohm input resistance.

 

PMOS, voltage drop with ROUT of 82 ohms-

 

To measure output resistance: You can see that when adding a resistor to ground at the output of the PMOS with a value that matches the calculated Rout value gives about a half signal which shows that a voltage divider has been used, meaning that both resistances are very close, or essentially the same value.

 

 

 

NMOS EXPERIMENTAL RESULTS – SOURCE FOLLOWER

 

NMOS, VoutN – you can also see that the gain is 1 in the circuit which matches the calculations above.

 

 

NMOS Voltage Drop Over Rin = 33.33k resistor                                               NMOS Voltage Drop Over Rout = 52 ohm resistor             

 

 

 

To measure input resistance: We found Rin to be 33.33k so we added a 33.33k resistor and a capacitor to measure the voltage drop across the resistor. We can see the input to be 100mV and the delta of the AC input signal is 62.8mV. So the voltage drop is 100mV – 62.8mV = 37.2mV. Then to find the AC current we know that V=IR, so

I = (62.8mV / 33.33k) = 1.88uA.

Rin = (vout / I) = 62.8mV / 1.88uA = 33,330 ohm input resistance.

 

To measure output resistance: You can see that when adding a resistor to ground at the output of the NMOS with a value that matches the calculated Rout value gives about a half signal which shows that a voltage divider has been used, meaning that both resistances are very close, or essentially the same value.

 

NMOS VGS. VG is yellow and VS is purple – VG is 100mV which is the input and VS measures to be 48.8mV which is approximately half of the input.

VGS = VG – VS = 100mV – 48.8mV = 51.2mV

 

 

 

Circuit 2 – Common-Source Amplifiers:

 

 

 

Calculations:

 

Circuit 2: NMOS CALCULATIONS - common source

 

Values from above calculations:

Kpn = 0.1233A/V^2

Vthn = 1.824V

Gmn = 17.904mA/V

 

Rin:   = Rin

Rout:

 

AC

Finding gain:

 

 

 

 

 

 

DC Bias:

 

 

 

 

 

 

 

 

 

 

 

Circuit 2: PMOS CALCULATIONS - common source

 

Kpp = 0.145A/V^2

Vthp = 2.875V

Gmp = 10.63mA/V

 

Rin:   = Rin

Rout:

 

AC

Finding gain:

 

 0

 

 

 

DC Bias:

 

 

 

 

 

 

 

 

 

 

 

 

PMOS COMMON SOURCE

 

VoutP                                                                                                 

 The gain of the PMOS was -6.8V/V. The gain here is about -6.

 

 

Voltage Drop Over Rin = 33.33k                                                           Voltage Drop over Rout of 1k

 

  

 

To measure input resistance: We found Rin to be 33.33k so we added a 33.33k resistor and a capacitor to measure the voltage drop across the resistor. We can see the input to be 100mV and the delta of the AC input signal is 57.6mV. So the voltage drop is 100mV – 57.6mV = 42.4mV. Then to find the AC current we know that V=IR, so

I = (42.4mV / 33.33k) = 1.27uA.

Rin = (vout / I) = 57.6mV / 1.27uA = 45,282.56 ohm input resistance.

 

To measure output resistance: You can see that when adding a resistor to ground at the output of the PMOS with a value that matches the calculated Rout value gives about a half signal which shows that a voltage divider has been used, meaning that both resistances are very close, or essentially the same value.

 

VSG = VG is the yellow signal and VS is the purple signal. VSG = VS – VG = 100mV – 28.8mV = 71.2mV = VSG

 

 

 

NMOS COMMON SOURCE

 

VoutN                                                                                                 

   The NMOS gain was about -5.4V/V in the calculations and experimentally it looks about a little bit less than one. They are not the same.

 

 

NMOS Voltage Drop Over Rin of 33.33k                                          NMOS Voltage Drop Over Rout of 1k

 

 

To measure input resistance: We found Rin to be 33.33k so we added a 33.33k resistor and a capacitor to measure the voltage drop across the resistor. We can see the input to be 100mV and the delta of the AC input signal is 58.4mV. So the voltage drop is 100mV – 58.4mV = 41.6mV. Then to find the AC current we know that V=IR, so

I = (41.6mV / 33.33k) = 1.248uA.

Rin = (vout / I) = 58.4mV / 1.248uA = 46.794 ohm input resistance.

 

To measure output resistance: You can see that when adding a resistor to ground at the output of the NMOS with a value that matches the calculated Rout value which is 1k in this case and gives about a half signal which shows that a voltage divider has been used, meaning that both resistances are very close, or essentially the same value.

 

 

VGS NMOS –> VG = yellow and VS = purple. The VG value is 100mV which is what we inputted as the signal and the Vout value is 57.6mV. VGS = VG – VS = 42.4mV

 

 

Circuit 3 – Common-Gate Amplifiers:

 

 

 

PMOS CALCULATIONS – common gate

DC is the same as the above two circuit calculations so only AC is displayed.

 

Kpp = 0.145A/V^2

Vthp = 2.875V

Gmp = 10.63mA/V

 

 = 1k

  

ohms

V/V

 

NMOS CALCULATIONS – common gate

DC is the same as the above two circuit calculations so only AC is displayed.

 

Kpn = 0.1233A/V^2

Vthn = 1.824V

Gmn = 17.904mA

 

 = 1k

-   

  

ohms

V/V

 

 

NMOS – Common Gate

 

VoutN – the gain we calculated was about 6.415 and the gain in the circuit here is about 5, it reads 466mV and the input is 100mV.                                                                                         

 

 

Rin = 50ohms Voltage Drop                                                       Rout = 1k Voltage Drop

 

  

 

To measure input resistance: We found Rin to be 33.33k so we added a 33.33k resistor and a capacitor to measure the voltage drop across the resistor. We can see the input to be 100mV and the delta of the AC input signal is 69.2mV. So the voltage drop is 100mV – 69.2mV = 30.8mV. Then to find the AC current we know that V=IR, so

I = (30.8mV / 33.33k) = 0.924uA.

Rin = (vout / I) = 69.2mV / 0.924uA = 74,891 ohm input resistance.

 

To measure output resistance: You can see that when adding a resistor to ground at the output of the NMOS with a value that matches the calculated Rout value which is 1k in this case and gives about a half signal which shows that a voltage divider has been used, meaning that both resistances are very close, or essentially the same value.

 

VGS –> VG and VS. VGS is 45.8mV in this circuit.

 

 

 

PMOS – Common Gate

 

The gain of the PMOS common gate circuit calculated is 5.15 and the gain experimentally is about 5.

 

 

Rin = 82ohm voltage drop                                                             Rout = 1k voltage drop

 

 

To measure input resistance: We found Rin to be 33.33k so we added a 33.33k resistor and a capacitor to measure the voltage drop across the resistor. We can see the input to be 100mV and the delta of the AC input signal is 66.4mV. So the voltage drop is 100mV – 66.4mV = 33.6mV. Then to find the AC current we know that V=IR, so

I = (33.6mV / 33.33k) = 1.008uA.

Rin = (vout / I) = 66.4mV / 1.008uA = 65872 ohm input resistance.

 

To measure output resistance: You can see that when adding a resistor to ground at the output of the NMOS with a value that matches the calculated Rout value which is 1k in this case and gives about a half signal which shows that a voltage divider has been used, meaning that both resistances are very close, or essentially the same value.

 

PMOS Rout at VSG = VS – VG => 74.8mV.

 

 

Circuit 4 – Push-Pull Amplifier:

 

 

·        Discuss the operation of this amplifier in your lab report including both DC and AC operation. 

This circuit works as an inverter and the gain is controlled by the resistor R1. The larger the resistor, the larger the gain and the smaller the resistor the smaller the gain is. DC operation is the same as any other circuit and the values can be calculated by finding VGS and VSG and then using the ID equation. More calculations and details are below.

 

·         Hand calculate the gain of this amplifier.

 

o    Do you expect this amplifier to be good at sourcing/sinking current? Why or why not?  I do expect them it to be good at sinking and sourcing current because the function of the NMOS and PMOS when connected allows the amplifier to perform both operations. It can sink current when the PMOS is off and the NMOS is on. It can source current when the NMOS is off and the PMOS is on.

·          

o    What happens to the gain if the 100k resistor is replaced with a 510k resistor? Why?

o    The gain increases significantly because with a bigger resistor, the circuit can have a larger gain. The equation is linear so increasing the resistor value will increase the gain value since the gmn and gmp values stay the same with a change of resistance. A decrease in resistance will make it so that the gain decreases.

 

PMOS

Kpp = 0.145A/V^2

Vthp = 2.875V

Gmp = 10.63mA/V

 

NMOS

Kpn = 0.1233A/V^2

Vthn = 1.824V

Gmn = 17.904mA

 

 

 

With 100k Resistor

 

With 510k Resistor

 

 

 

 

The outputs of our push pull circuit cut off because the input was too large. With a smaller input signal, the output will not rail.

You can see below some LTSpice values that correspond to our experimental results with an input of 20mV. In the LTSpice simulation above, we used an input signal of 1mV and that signal came out to be a normal sinusoid without any railing.

 

 

 

Push Pull 100k                                                                      Push Pull 500k

 

 

 

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