Lab 3 – EE 420L Engineering Electronics II Lab
Op-amps I, basic topologies, finite gain, and offset
Authored by Shadden Abdalla
February 17, 2019
Abdals1@unlv.nevada.edu
Prelab: Watch op-amps videos and simulate the
circuits.
~~~~~~~~~~~~~
LAB-
This lab consists of the following instructions and questions.
1.
Review
the data sheet of LM324.
2.
Assume
VCC+ = +5v and VCC- = 0V.
3.
Questions:
a. Knowing
the non-inverting input, Vp, is at the same potential as the inverting input,
Vm, (called the common-mode voltage, VCM) what are the maximum and minimum
allowable common-mode voltages? Support your answer with an entry from the
electrical characteristics table in the datasheet.
The
minimum is 0 volts, and the maximum is from about 3V to 3.5V. You can see the
support from the data sheet above where it says “VCC-1.5” and VCC-2.” 5-1.5V =
3.5V and 5-2V = 3V.
b. What is
a good estimate for the op-amp's open-loop gain? Support your answer with
a plot from the datasheet and an entry from the electrical characteristics table.
From the data sheet you can see that at 0Hz it
is about 110dB and we can use that to calculate the open loop gain.
is the
open loop gain.
c. What is
a good estimate for the offset voltage? For worst case design what value
would you use?
For
worst case you would choose the largest offset voltage given, 9mV. A good
estimate is 7mV because it is the most common value.
4. Build
and test the following circuit. To the right you can see the input signal sent
out from the function generator.
Below is the circuit on
the breadboard and the waveforms on the oscilloscope. The input signal is
yellow, channel 1 and the output signal is blue, channel 2
5.
Answer these questions:
a. What is
the common-mode voltage, VCM? Does VCM change? Why or why not?
The common mode voltage,
VCM, is a voltage that takes the voltages from the two conductors and halves
them. In this case, the common mode voltage is 2.5V and does not change. It
does not change because it is used as reference voltage. It is half of the
input voltage VCC which is 5 volts because it is split through the two 10k
resistors, making a voltage divider.
b. What is
the ideal closed-loop gain?
The ideal closed loop
gain is found using the inverting op-amp equation for gain, -RI/ Rf which gives
us -5k/5k which is 1.
c. What is
the output swing and what is it centered around?
The output swing is
given by the input from the function generator which is shown above to be 200mV
peak to peak. It is centered around 2.5V. Both values can be seen above in the
photo of the input signal from the function generator.
d. What
happens if the input isn't centered around VCM, that is, 2.5 V?
The signal starts to
clip, which happened in simulation. The open loop gain is not enough to make
the negative terminal Vm rise to the positive terminal Vp. In the case that Vp
is larger and increases, the output voltage decreases so we cannot have a value
of Vp that is too high. You can see the output clip once the Voltage is
increased in the photo below.
e. Provide
a detailed discussion illustrating that you understand what is going on.
My analysis of the
circuit begins with the 5V input at node VCC. The voltage then splits through
the voltage divider made up of two 10k resistors and becomes 2.5V, VCM. VCM
goes into the positive terminal of the inverting op amp portion of the circuit
where Vm is also 2.5V because of the input signal from the frequency generator.
Vp and Vm are at the same potential and the gain of this op amp, -RI/Rf is 1
which is unity gain. The output of this circuit must be the same signal but
inverted, with a new phase of about 180 degrees. The output remains around 2.5V
because the gain of the circuit is 1.
f. What is
the maximum allowable input signal amplitude? Why?
V- is set to 0V and V+
is set to 5V so the maximum input signal amplitude is half, about 2.5V ideally
but since we are operating on a breadboard with an actual chip, the signal
should swing lower than 2.5V. The swing would have to be something to help it
stay closer to 2.5V so maybe a maximum swing of +/-1V or something even closer
like +/-500mV. As we saw with the simulation above, any voltage that goes
higher than 2.5V results in clipping.
g. What is the maximum
allowable input signal if the magnitude of the gain is increased to 10? Why?
Previously the gain was
only 1, so the maximum input signal was 2.5V. Now it will be 250mV because when
the gain increases by ten, we must divide the input signal by 10 to get the new
gain.
h. What is the point of
the 0.01 uF capacitors from VCC and VCM to ground?
Adding decoupling
capacitors is a practical approach to reduce noise and allow power and ground
signals to appear more clearly.
i.
Are these values critical or could 0.1 uF, 1,000
pF, 1 uF, etc. capacitors be used?
You can use any value
for a decoupling capacitor, they will all serve the same purpose.
j.
The data sheet shows that this op-amp has an
input bias current that flows out of the op-amp's inputs of typically 20 nA. This current flows out of both the non-inverting and
inverting inputs through the resistors connected to these inputs. Show how the
operation of the circuit can be affected if, for example, R1 and R2, are much
larger. Explain what is going on.
Because of V=IR, using a
larger resistor will create a larger voltage at Vm. This will affect the
voltage at Vp because of the way an op- amp works. It would create a different
output voltage.
k. What is
the input offset current? What does this term describe?
This term describes the
current pulled in at the input terminals of an op-amp. Bias current can flow
through it and it is also considered leakage current. It describes the
difference between the bias currents at Vp and Vm.
-------------------------------------------------------------------------------------------------
--------------------------Circuit
Two------------------------------
Explain how the following circuit can be used to measure the op-amp's offset
voltage. Note that if the output voltage is precisely the
same as VCM then the op-amp has no offset voltage (this is very possible). To
measure small offset voltages, increase the gain by increasing RF to 100k or
larger. Explain what is going on. Measure
the offset voltage of 4 different op-amps and compare them.
In this circuit,
increasing the RF value can reduce the current traveling from Vout to Vm. There is no offset
voltage when Vout = VCM so any small changes can
really show the offset voltages. Increasing the value of RF allows us to view
the offset voltage more easily.
Testing the circuit using 4 different op-amps.
The Equation for measuring offset voltage is:
= offset voltage
|
Op-amp |
Vout (V) |
VCM (V) |
Vout – VCM (V) |
V-offset (V) |
|
LM324 |
2.4647 |
2.5235 |
-0.0588 |
0.000588 |
|
LM348 |
2.8911 |
2.5320 |
0.3591 |
0.003591 |
|
LM339 |
2.4737 |
2.5236 |
-0.0502 |
0.000502 |
|
LM741CN |
2.8827 |
2.5300 |
0.3527 |
0.003527 |
You can see from the
table above that the LM324 and the LM339 had similar offset voltages and the
LM348 and the LM741CN had similar offset voltages. Both were fairly low
voltages, measured in the millivolt ranges.
LM 324, Vout to the
left and VCM on the right
LM 348, Vout and VCM
LM 339, Vout and VCM
LM741CN, Vout and VCM
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