Lab 9 - ECE 420L Engineering Electronics II Lab  

Authored by Frank Sanchez,

sanchezf@unlv.nevada.edu

4/19/2017 

The hand calculations for the BMR design are displayed below, along with the parameters used for LTspice.

Hand_Calculations.PNGcd4007_model.PNG

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Experiment 1

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The experiment was challenging, due to it needing so many transistors. The wiring was a process.

The simulation results were a close approximate to the experimental. The experimental results showed a higher than expected result.

LTspiceExpeimental
experiment_1_simulation.PNGexperiment_1.PNG
Experimental Plot- Bias NExperimental Plot- Bias P
experiment_1_N.PNG
experiment_1_P.PNG
Id Vs. VDDexperiment_1_Current.PNG

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Experiment 2

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For this experiment, i deceded to go with the 200k resistor in order to sample my current going through the transister. This in hand made it easier for me to find my desired values.
Schematic
Experiment_2_Schematic.PNG

The simulations below show the drain current for both the NMOS and PMOS varied by the voltage supplied.
NMOS Current MirrorPMOS Current Mirror
NMOS_CURRENT_MIRROR.PNGPMOS_CURRENT_MIRROR.PNG

Experimental Results


The experimental values are seen below for both Nmos and Pmos current mirrors. All values recorded varying the power supply and recording the current using the multimeter.
Experiment_2_data.PNG

As you can see, I came up with a higher current than my theoretical results. This could have been due to bad wiring but after multiple re-wirings this is what I came up with. It is definitely correlated to the theoretical results, but just with a "higher" current uptake.
NMOSPMOS
experiment_2_NMOS.PNG
experiment_2_PMOS.PNG

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Experiment 3

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NMOS Cascode Current Mirror

NMOS_CASCODE_CURRENT_MIRROR.PNG

LTspice
Experiment_3_simulation_NMOS.PNG

Experimental Results


This table was made by varying the power supply and recording the values through the multimeter.

NMOS_CURRENT_MIRROR_Table.PNG


Values were plotted for visualization below.

NMOS_CURRENT_MIRROR_Experiment.PNG

As you can see the experimental values did not match the theoretical values for this experiment. It might have had to do with the wiring for the design or another fault. 


PMOS Cascode Current Mirror

PMOS_CASCODE_CURRENT_MIRROR.PNG

LTspice
Experiment_3_simulation_PMOS.PNG

Experimental Results


This table was made by varying the power supply and recording the values through the multimeter.

PMOS_CURRENT_MIRROR_Table.PNG

Values were plotted for visualization below.

PMOS_CURRENT_MIRROR_Experiment.PNG

As you can see the experimental values did not match the theoretical values for this experiment. It might have had to do with the wiring for the design or another fault. 

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Lab Conclusion:

Experiment 9 gave me a good idea on how a BMR using the CD4007 transistor chip works. This lab was verys similar to our last lab, due to it giving the student an understanding on how to characterize a transistor. This lab gave us an idea how a Beta-Multiplier Reference is layed out and tested for characterization.


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