Lab 1 - ECE 420L 

Authored by Silvestre Solano,

Email: Solanos3@unlv.nevada.edu

1-30-2015



For Lab 1,  we had to construct and measure the circuits shown in figures 1.22, 1.23 and 1.24 (the 1pF capacitor is replaced with a 1uF capacitor) of the CMOS book. Also, we had to compare the measured results with hand calculations and LTspice simulations. Please note that pictures containing data will have important or relevant data enclosed in a red box for easier identification.

 

 

1.21

 

For the first circuit shown in figure 1.21 the LTspice schematic, waveform, and measured parameters are shown below.

 

 

According to the simulation results, the peak voltage for the Vout is shown to be 622.246 mV. The time delay measured from the peak of Vout to the peak of the corresponding Vin is shown to be 705.467 uS. The actual measurements for this circuit taken in lab are shown in the following two pictures. The first one shows the Vout to be about 700 mV and the second one shows the time delay to be about 620 uS.
 
Vout

 
Time Delay


As for the hand calculations, they show a peak voltage of 623 mV and a time delay of about 715 uS. The hand calculations are shown below.
 

 
It appears that there is some variation in the results for all three methods. These variations are best shown in the table below. The greatest variation is from the measurements made in Lab.
 
1.21LTspiceHand CalculationMeasurement in Lab
Vout622.246 mV623 mV700 mV
Time Delay705.467 uS715 uS620 uS

 
 
1.22
 
As before with the previous circuit, the LTspice simulation with schematic, waveform, and measurements are shown below.
 

 
The LTspice simulation show to have peak voltage of about 693.19 mV for Vout and a time delay of about 98.0592 uS. The actual measurements in lab show a Vout of 800 mV and a time delay of 150 uS. The results are shown below.
 
Vout

 
Time Delay

 

The hand calculations seem to match the simulations. The Vout is calculated to be about 694 mV and the time delay is about 95 uS. They are shown below.

 

 
 A table showing the results is shown below.
 
1.22LTspiceHand CalculationMeasurement in Lab
Vout693.19 mV694 mV800 mV
Time Delay98.0592 uS95 uS150 uS


 
 1.24
 
For the circuit shown in figure 1.24, the LTspice simulation is shown below.
 

 
According to the above simulation the time delay is shown to be 6.7 mS. However, the 6 mS that are defined in the simulation parameters must be subtracted from the 6.7 mS which results in the correct time delay of 0.7 mS The hand calculations are trivial and it is simply time delay=0.7*R*C = 0.7mS
 
The actual measurements taken in lab seem to differ by 0.1 mS  and the waveform captured in lab is shown below.
 

 
 
The table below shows the results.
 
1.24LTspiceHand CalculationMeasurement in Lab
Time Delay0,70082 mS0.7 mS0.609 mS
 
 
For the circuits in figures 1.21, 1.22, and 1.24, the hand calculations and the simulation results seem to closely match. However, the actual measurements seem to differ significantly from the hand calculations and simulations. This is probably due to the substandard equipment that we are forced to work with and human error. For this particular lab, the equipment used was probably the major issue due to the fact that we were not assigned a breadboard before the experiment began and the lab seems to lack decent scope probes. Dr Baker told us to "macgyver" the experiments without having taken the mandatory safety lecture. If of course, we had an actual breadboard and functioning oscilloscope probes, we might have gotten better results.
 
 
Apparently, we have to make a table of arbitrary points on the frequency response for for the circuit in figure 1.21. The LTspice results are shown below.
 

 
A table showing frequency, phase, and magnitude is shown below at has data points spaced at about 1dB magnitude.
 
Frequency HzMagnitude dBPhase Degrees
82.18-1.03-27.31
124.5-2.07-38.03
160.5-3.05-45.24
197.6-4.05-51.15
237.7-5.09-56.19
279.3-6.11-60.32
320.8-7.04-63.61

 
 
 
 
 To conclude this report, I will back up my stuff on my laptop/ flash drive/ email account /  as shown below.
 


 


 

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