Lab 6 - EE 420L
Authored
by Shada Sharif,
sharifs@unlv.nevada.edu
20 March 2015
Pre-lab work:
- This lab will utilize ZVN3306A and ZVP3306A MOSFETs.
- Review datasheets for mosfets, and the simulations attached in zip file.
- Watch the video by Dr. Baker.
Lab Description:
- This
lab is about single stage transistor amplifiers. In the lab different
types of amplifiers will be experimentally tested. The amplifiers are
common source, common drain, and common gate. We will experimentally
find the gain of each type as well as the input and output resistance.
Lab Report should include:
- LTspice simulation of the circuits as well as the waveforms.
- Hand calculations for deriving the gain, input, and output resistance of the amplifiers.
- Scope pictures that prove the hand calculations experimentally.
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Experiment #1
- The
first experiment consisted of testing NMOS and PMOS common drain
amplifier, which are also called source followers. Source followers
have a gain of one and they are useful for high input impedence
purposes, and low output impedence. They are just like a voltage
follower as in op-amps. Therefore, source followers are great
transition stage between a circuit that has a high output impedence
that needs to be fed to a low input impedence circuit. The gate here is
the input and the output is the source, drain is common for both the
input and output.
- Below
attached the LTspice simulations of the source follower mosfets, notice
the DC offset was subtracted from the NMOS and PMOS output AC
signal.
- Below
attached are the hand calculations, followed by the scope waves to
verify the calculations. The experimental testing was done under high
frequency so that the capacitors act as a short in AC and an open in DC
so that the DC biasing is not changed. The gate here is at a higher
potential so when using the capacitors the + side was facing the gate.
- The gm values were estimated from the datasheet as shown below
- Wave forms from the scope for the NMOS and PMOS gain, input resistance testing, and output resistance testing.
NMOS
- Above
calculation shown shows how the real input or output resistance was
calculated from the experiment, looking at the waves from the scopes if
the output max is half the input then the resistance chosen or
estimated is the correct input resistance, if the output is not half
then we do the calculation of the voltage dividor shown above, leaving
the resistance as a variable. This has been done for all the
experiments below.
- In
order to measure the input impedence of the source follower, we first
had to derive the hand calculations of the input impedence, and from
there we would plug in the numbers of resistors used to get a numeric
answer. After having a numeric answer we would get a resistor that is
similar to the value we assumed the input impedence equals. We
create a voltage dividor by using a capacitor follower by the resistor
we picked into the gate of the amplifier, and then apply a test voltage
at the input of the capacitor. We measure the input signal and measure
the peak value and also measure the signal at the end of the resistor
we picked. If the signal we measured at the end of the resistor is half
the input signal this means that the resistance we picked is almost
equal to the input impedence/resistance of the amplifier which resulted
in the half signal voltage dividor output.
- Vout=Rin/(Rin+R_picked)*Vin, if Rin=R_picked => Vout = R/2R*Vin => Vout=(1/2)*Vin.
- As
for the output resistance measurement, it is a very similar concept as
measuring the input resistance.
So we create the same voltage dividor after doing some hand
calculations, the only difference that needs to be done is that when
testing the output resistance and adding a capacitor before/after the
picked resistor so that the DC biasing is not disturbed, is that the
junction at where the input was needs to be grounded. Then we use that
same input signal as a test voltage at the output side. So basically
whenever we test resistance we only apply a test voltage at the place
we need to measure the resistance in and ground other junctions where
an input signal was in orgionally. So the gates of the mosfets were
grounded and the drains had the test voltage applied to them.
NMOS | Hand calculations | Simulations | Experimental | PMOS | Hand calculations | Simulations | Experimental |
gain | 0.947 V/V | 0.9 V/V | 0.8 V/V | gain | 0.917 V/V | 0.9 V/V | 0.81 V/V |
input resistance | 33k ohms | 33k ohms | 33k ohms | input resistance | 33k ohms | 33k ohms | 33k ohms |
output resistance | 48 ohms | 53 ohms | 273 ohms | output resistance | 83 ohms | 90 ohms | 200 ohms |
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Experiment #2
- The
second experiment was about testing common source amplifiers. Common
source amplifiers are used for voltage amplifications. The input is at
the gate and the output is at the drain while the source is common.
- Below are the LTspice simulations showing the gains of each MOSFET.
- Hand calculations of the PMOS and the NMOS gain, input and output resistance.
- Below attached the scope waveforms of the mosfets.
- In the above calculations, the input resistance estimated was the correct one since the output wave was half of the input.
- Looking
at the derived gain one can see that the higher the Rsn and Rsp are the
gain is lower. So increasing these resistances, decreases the gain.
NMOS | Hand calculations | Simulations | Experimental | PMOS | Hand calculations | Simulations | Experimental |
gain | -7 V/V | -7 V/V | -5.2 V/V | gain | -5 V/V | -6 V/V | -6.1 V/V |
input resistance | 33k ohms | 33k ohms | 33k ohms | input resistance | 33k ohms | 33k ohms | 33k ohms |
output resistance | 1k ohms | 1k ohms | 850 ohms | output resistance | 1k ohms | 998 ohms | 1.2k ohms |
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Experiment #3
- The
third experiment was about testing common gate amplifiers. Common gate
amplifiers are used as current buffers or voltage amplifiers, the input
is at the source and the output is at the drain while the gate is
common to both the input and the output.
- The LTspice simulations are attached below.
- Hand
calculations shown below. As for Rsn and Rsp, it is the same as in the
common source, as these resistances increase in value, this causes the
gain to decrease.
- Wave forms of the MOSFETS.
NMOS
- The calculation above for the Rout of the PMOS resistor used was 1k ohms and the output was half of the input.
NMOS | Hand calculations | Simulations | Experimental | PMOS | Hand calculations | Simulations | Experimental |
gain | 6.5 V/V | 6 V/V | 7 V/V | gain | 5 V/V | 5 V/V | 3 V/V |
input resistance | 153 ohms | n/a | 189 ohms | input resistance | 183 ohms | n/a | 300 ohms |
output resistance | 1k ohms | 1k ohms | 1.14k ohms | output resistance | 1k ohms | 1k ohms | 1k ohms |
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Experiment #4
- The
last experiment was for testing a push-pull amplifier, which is an
inverter where the output can go from rail to rail. The push pull is
also a class AB amplifier.
- LTspice simulations are attached below
- Hand calculations are shown below
- The amplifier can be good at sourcing or sinking current
since it is a class AB amplifier as mentioned earlier so it can push
current into the load or pull the current out of the load. If the input
and output are at the same potential the PMOS and NMOS are both on and
current flows that is class A. If we have an input of VDD the PMOS is
off and NMOS pushes current into load, and if the input is 0V the NMOS
is off and the PMOS pulls current from the load, this is class B. So it
is class AB since it can operate both ways.
- If the load
resistance is changed to 510k ohms the gain will increase which can be
seen in the gain formula above. This is also shown below in the second
wave form where the output is saturating due to the high gain.
- Waveforms shown below.
Push-Pull | Hand Calculations | Simulations | Experimental |
gain | 2.9k V/V | 2k V/V | 1.5k V/V |
Return to all pictures attached
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